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Design >> Mixed-Signal Design >> Reference Buffer
https://designers-guide.org/forum/YaBB.pl?num=1147830908

Message started by ywguo on May 16^th, 2006, 6:55pm

Title: Reference Buffer
Post by ywguo on May 16^th, 2006, 6:55pm

Hi,

In data converter design, we often use internal buffer and external filter for the reference voltages. However, the relative papers or patents are rare.

I found one pape that analyze the reference buffer in CMOS Data Converters for Communications by Mikael Gustavsson, J. Jacob Wikner, and Nianxiong Nick Tan. ADI has a US patent No. 5,854,574. It still needs external filter cap.

Now more and more pipelined ADC doesn't require any external filter cap for the reference voltage. Of course that reduces the overall cost. Would you like to recommend any papers, patents, app notes, and so on?

Thanks
Yawei

Title: Re: Reference Buffer
Post by vivkr on May 22^nd, 2006, 4:30am

Hi Yawei,

Ultimately, you need to provide a low impedance reference from DC all the way upto
very high frequencies. Using an external filter helps as you can use a low-power solution.

Without this, you will burn more power. However, there is a good scheme discussed in teh JSSC paper by Sumanen, Waltari & Halonen (July 2001), ""A 10-bit 200 Ms/s CMOS Parallel Pipeline A/D Converter". See Fig. 9.

Regards
Vivek

Title: Re: Reference Buffer
Post by ywguo on May 22^nd, 2006, 9:26pm

Hi Vivek,

I am trying my best to design a buffer, which provides low output impedance over DC to very high frequency.

I had studied Sumanen's thesis and that paper before. The 10-bit 200 MS/s ADC achieved 1.6Vpp differential input range at 3.0V supply. The input signal range is relative smaller. That reference buffer was source follower. So the input signal range was limited by one Vds + one Vgs to both rails. What do you think about it?

Best regards,
Yawei

Title: Re: Reference Buffer
Post by vivkr on May 22^nd, 2006, 11:50pm

Hi Yawei,

You are right. The configuration used by Sumanen et al. does cause a limiting of the reference. Moreover, the limiting is dependent on process, temperature etc. I imagine that for the author, it was not very critical to have these limitations.

For most applications, you would need to guarantee that the absolute reference levels are fairly stable. Hence, my comment on the desirability of using an external filter to condition a well-defined buffered DC-stable reference level. The alternative is of course to burn a lot of power in a high-speed buffer without filters.

However, if you are not worried about the absolute value of the reference so long as it does not vary too much, and is reasonably large, then you could always try to increase the reference path gain, by scaling up the capacitors that feed in the reference charge. This would need some extra caps which are charged only to reference, and would slow down your MDAC a bit due to the reduced feedback factor. However, depending on your overall ADC, it might provide an option. You could easily scale up the effective value of the reference by 2x without excessive degradation in performance, and that ought to be enough.

Regards
Vivek