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Design >> Mixed-Signal Design >> Mixed-mode simulation
https://designers-guide.org/forum/YaBB.pl?num=1148643768

Message started by hpeyravi on May 26^th, 2006, 4:42am

Title: Mixed-mode simulation
Post by hpeyravi on May 26^th, 2006, 4:42am

Hi all
I have set-up a mixed-mode test bench containing digital blocks with "functional" views. Simulation ends up successfully but all outputs of the digital blocks are zero and it seems that it is not working at all, (The schematic views of these digital cells work fine in an ordinary simulation). I also see the following note on my CIW:
"*** NOTE: You have selected to instantiate behavioral/functional module explicitly.
This will cause problems if the behavioral/functional module has ports that are
declared just by a port expression having bit select or part select of a vector
or bundles/concatenations of nets."
Actually I don't get the meaning of this note. Is the problem related to this note? How I can fix it?
Could be other problem involved?

Regards
Hamed

Title: Re: Mixed-mode simulation
Post by Andrew Beckett on May 29^th, 2006, 5:20am

Are you using spectreVerilog or the newer AMS Designer? I'd say you need to probe the signals around to see what is going on.

I suspect from the message that you're using spectreVerilog - can you try AMS?

Andrew.

Title: Re: Mixed-mode simulation
Post by hamed on May 31^st, 2006, 2:05am

Thanks Andrew,
Actually I have been using SpectreVerilog. I have checked all signals arround, but it seems that a functional block doesn't work at all.
I haven't been able to use AMS because some problems in our environment settings.
As I do continue to make AMS operational, I would appreciate if you tell me how AMS can help if SpectreVerilog can not recognize/deploy the functional block?
Is there any possibility of having bugs in SpectreVerilog?

Hamed

Title: Re: Mixed-mode simulation
Post by raf on Jun 27^th, 2006, 5:34am

It's been a while since I used spectreVerilog, but isn't there a requirement to have at least one analog component in there? For example, add an RC load to your functional block. See if that works.

Also, make sure your threshold voltages and logic levels are set up properly.

Hope it helps,
Raf