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Design >> High-Speed I/O Design >> low supply voltage, high output swing?
https://designers-guide.org/forum/YaBB.pl?num=1149000811

Message started by neoflash on May 30^th, 2006, 7:53am

Title: low supply voltage, high output swing?
Post by neoflash on May 30^th, 2006, 7:53am

In 130nm cmos process, the supply voltage will be as low as 1.0v ± 10%. So, the worst case supply will be 900mV.

chip's output is differential, CML style signal and AC coupling is used. CML output driver is required to have swing as high as 900mVp-p.

Is that possible to be implemented without additional high supply voltage?

I do not think it is possible, since the output common mode will be as low as "900mV-450mV=450mV". And, when output reach max swing, the low output node will be as low as "225mV". That is too low. Tail device might fall out saturation, or output impedance will be distorted.

What's the real story behind those serdes products?

Title: Re: low supply voltage, high output swing?
Post by mikki33 on May 31^st, 2006, 2:17am

Your assumption of common mode is wrong. Whith 0.9V supply and 0.9V p-2-p signal, you can define common mode equal to 675 mV. So, the single ended signal will move between 450-900 mV. In this case the single ended signal has 450 mV swing and differential - 900. Use pull up resistors as a load.

It is possible to design this kind of circuit but it is not so easy. It hardly depends on working frequencies. Sometimes, pull up resistors put on the board with slightly higer power supply (or well defined, in this case you will require less tolerance of power supply 1V +/- 5%).

Michael

Title: Re: low supply voltage, high output swing?
Post by neoflash on May 31^st, 2006, 5:54am

what if the AC coupling capacitor is used?

thus there is only near-end 50ohm resistor works as pull up resistor.

Title: Re: low supply voltage, high output swing?
Post by mikki33 on May 31^st, 2006, 6:13am

So, you will put the capacitors after the resistors. Or I don't understand the question.

Title: Re: low supply voltage, high output swing?
Post by neoflash on May 31^st, 2006, 6:44am

i guess you are not familiar with that circuit style. Let me just elaborate.

There are totally four 50ohm termination resistors as pull up. Two at the near end and two at the far end.
However, far end pull up resistors are isolated from near end output by a 100nF capacitor. That's called ac coupled double termination.

Title: Re: low supply voltage, high output swing?
Post by mikki33 on May 31^st, 2006, 7:38am

That was exactly what I thought about. You are putting 50 Ohm pullups as a load. They are also working as a termination. So, you have 100 Ohm differential load at you side and sending signal to the line via serial caps.
On the far end (at the receiver) you have another 100 Ohm differential resistance, so in parallel with the near end ones you have differential load of 50 Ohm. Or 25 Ohm single ended.

Title: Re: low supply voltage, high output swing?
Post by manyoki on Jun 29^th, 2006, 2:17pm

The problem is very real. If your return loss can afford, you can source two common mode currents into the outputs wwith two pmos sources. They will have to be rather large to keep them in saturation, that's why I mentioned the return loss. This way you can alleviate the headroom for the diffpair, but you cannot pull up your common mode all the way to 900m-225mV.

You can relay on a higher supply just for the common mode shift.

Or you can use voltage driver. 900mVppd would be the maximum from that. No margin left though.

Zoltan

Title: Re: low supply voltage, high output swing?
Post by loose-electron on Aug 4^th, 2006, 10:00am

The schematic posted is of a current steering SerDes driver. The termination at both ends is required to minimize line refelctions, no probem with that.

However, a lot of SerDes use a bias point at common mode at the transmitter, because that way you can use a NMOS pull down and PMOS pull up to drive the output line.

That can get you to within 50-100mV of the power/ground rails. Pre-emphasis gets added at the transmit side by swapping the size of these switches. (Parallel switches to lower the Rds)

Due to backlplane losses, you are trying to get the best output amplitude that you can get.

Title: Re: low supply voltage, high output swing?
Post by neoflash on Nov 18^th, 2006, 7:25am

LE:

What you mentioned is LVDS style dirver, with termination. Is that type of driver used broadly in the industry?
There is rumor saying that its signal integrity is not that good. But due to its low power nature and cmos direct drivability, a lot of temptation to use that.

loose-electron wrote on Aug 4^th, 2006, 10:00am:

Title: Re: low supply voltage, high output swing?
Post by loose-electron on Nov 20^th, 2006, 9:59pm

You have a couple of different driver structures out there:

LVDS - which is typically on the order of 100mV signal swings, and gets processed differentially.

SerDes Over a lossy backplane - Again, differential signalling, but with a transmitter that often runs rail to rail, to make up for the backplane losses. (and yes, they do suck a lot of current)

Probably others as well, but those are the two that I have direct experience with.

Jerry