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Message started by Faisal on Jun 26th, 2006, 5:27am

Title: Convergence Difficulties
Post by Faisal on Jun 26th, 2006, 5:27am

I get the following smessage from Cadence

Warning from spectre at time = 30.6133ns during transient analysis tran
Convergence Difficulties resulted in error requirments being unsatisfied. Further occurrences of this warning will be suppressed.

My question are

1) How to know which node/component is responsible for this convergence problem and how to tackle it ?
2) Are my results erroneous, because further warnings are supressed ?

Title: Re: Convergence Difficulties
Post by Ken Kundert on Jun 26th, 2006, 12:09pm

Normally during transient Spectre will shrink its time step if it has convergence difficulties. The difficulties might be so severe that it basically shrinks its timestep down to nothing. But before giving up it makes one last attempt to continue by taking a large step, one that is larger than the truncation error controls would normally allow. If it succeeds it will give this message and continue. This situation generally occurs because there is a discontinuity in a capacitor. There is usually little that you can do about it because the discontinutity is generally in a built-in model. However if you have nonlinear capacitor models that you have written in Verilog-A you might want to inspect them closely for discontinuous behavior.

The warning is issued because Spectre ended up taking a step that was larger than the truncation error criteria normally allows. This may result in a small amount of error being present. However the error is usually small and is dissipated by the circuit over time.

-Ken

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