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Design >> Analog Design >> Settling time of fully differential opamp
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Message started by rajivs1001 on Jul 3rd, 2006, 1:56am

Title: Settling time of fully differential opamp
Post by rajivs1001 on Jul 3rd, 2006, 1:56am

Hello,

I am designing a SC programmable gain amplifier ( PGA with gain 1 or 2 ) using  fully differential folded cascode OTA with a SC-CMFB . Load are only capacitive with 25pF at each node. I have some questions in this regard.

1- Is it OK to use OTA for 25pF load cap ?
2- I have 25ns available for settling. How do i divide this time between Slewing and settling ? to be more specific how do I calculate Ibias and UGB.
3- I know how to calculate SR for a normal opamp but not sure how to do it for a SC PGA.

Can someone give me link to any document in this regard or make some suggestions.

Thanks and regards,
-Rajiv

Title: Re: Settling time of fully differential opamp
Post by vivkr on Jul 4th, 2006, 8:25am


rajivs1001 wrote on Jul 3rd, 2006, 1:56am:
Hello,

I am designing a SC programmable gain amplifier ( PGA with gain 1 or 2 ) using  fully differential folded cascode OTA with a SC-CMFB . Load are only capacitive with 25pF at each node. I have some questions in this regard.

1- Is it OK to use OTA for 25pF load cap ?
2- I have 25ns available for settling. How do i divide this time between Slewing and settling ? to be more specific how do I calculate Ibias and UGB.
3- I know how to calculate SR for a normal opamp but not sure how to do it for a SC PGA.

Can someone give me link to any document in this regard or make some suggestions.

Thanks and regards,
-Rajiv


Hi Rajiv,

1. Yes, it is OK to use an OTA, as the load is purely capacitive.
3. The slew rate is calculated in the same way as for an OTA. SR=Iout/Cload. As you are using a folded-cascode circuit with a well-defined load, it should be possible to compute both Iout and Cload just by inspection.

Note that Cload also includes contributions from the sampling cap, feedback cap, and input gate-source cap. You should first compute this effective load, possibly ignoring input gate-source cap for the first iteration. The closed-loop bandwidth will also be reduced when you change the gain from G=1 to G=2, depending on the choice of your SC amp architecture. Slew limiting will kick in harder for G=1.

Now for the harder question on how to divide the 25ns that you have into slewing and settling. Firstly, are you allowed to slew in the application? A lot hangs on this, as the design methodology is different. I assume that you are allowed to slew, since you decided on an SC amp in the first place.

Secondly, how accurate does this gain need to be? Let me make the crude assumption that you are looking at a gain accuracy between 0.1% to 1%, since cap mismatch will anyway limit you to 0.1% at the best. However, if you have other constraints such as THD, then they will decide your gain requirement.

There is no easy method to predict when an amplifier leaves the slewing region to enter linear settling. However, one may assume that this happens when the input to the amp is equal to the (Vgs-Vt) of the input device. You can also write the ideal output as a function of time during the amplification phase as Vo(t) ~ Vfinal(1-exp(-t/tau)), and the slope of this multiplied by the effective Cload will tell you when your amplifier is slewing (Cload*dV/dt > Islew).

For design, I would suggest that you allow about half the clock cycle for slewing assuming that you are looking at 60 dB accuracy from the opamp. Typically, the circuit will have settled to atleast 20-30 dB accuracy by the time you are done slewing. I do an example here assuming 20dB settling at end of slew and 60 dB desired accuracy.

Islew = Cload*dVmax*0.9/(0.5*Tclk) gives you an expression for current needed if you assume only 20 dB settling from slewing.

Ntau = Accuracy(in dB) - 20/ (0.5*Tclk) gives the remaining timeconstants required.
tau = 0.5*Tclk/Ntau (required timeconstant, gm, W/L from Islew information)

By the way, do include margins in your design, and do your tradeoffs. If you can, try the opamp by Castello (JSSC-A micropower switched capacitor filter...).

Regards
Vivek

Title: Re: Settling time of fully differential opamp
Post by rajivs1001 on Jul 4th, 2006, 11:41pm

thanks vivek for your help.

I simulated my design and  though PM is coming out to be 78 with 75dB DCgain and 160Mhz BW, I am seeing big oscillations at  the output and because of that settling is very slow (more than 500 ns against the required 25ns).

Settling improved when I added a small resistor(1k) in parallel to load cap (25p) but obviously it hurts DCgain as output impedance goes down.

I dont really understand the oscillation inspite of having 78 deg PM, I thought you get oscillations only for PM < 60 deg. Is that a correct statement ? For my design DC gain is really not a concern ( anything more than 40 dB is OK), should I still go for opamp from settling point of view ?

Thanks,
-Rajiv



Title: Re: Settling time of fully differential opamp
Post by chungmnig on Jul 4th, 2006, 11:57pm

Hi~~~vivkr
Do you know how to simulate the slew rate of opamp by Castello ?
thanks~~~~

Title: Re: Settling time of fully differential opamp
Post by rajivs1001 on Jul 5th, 2006, 2:12am

Hi vivek,

Further to my last reply, the oscillation problem at output is solved now . Actually I was using a behavioural model (using VCVS) for CMFB circuit  even for transient analysis. When I replaced that with the actual SC CMFB circuit, oscillations at output went away and now I am getting a good and as expected results.

However it would be interesting to know the reason of oscillation, I mean how does it matter what I am using for CMFB ?

Thanks and regards,
-Rajiv

Title: Re: Settling time of fully differential opamp
Post by vivkr on Jul 5th, 2006, 8:16am


rajivs1001 wrote on Jul 5th, 2006, 2:12am:
Hi vivek,


However it would be interesting to know the reason of oscillation, I mean how does it matter what I am using for CMFB ?

Thanks and regards,
-Rajiv


Hi Rajiv,

That is a fatal misconception !!! It does matter what you use for your CMFB, and an ideal CMFB and the real one will obviously differ. Sometimes, the difference between one CMFB and the other can make or break your circuit. Could you put a snapshot of your circuit, along with the response in the two cases (differential and common-mode).

Also, PM<60 deg is not the criteria for oscillations. I suppose you are talking of ringing and overshoot.

Regards
Vivek

Title: Re: Settling time of fully differential opamp
Post by vivkr on Jul 5th, 2006, 8:19am


chungmnig wrote on Jul 4th, 2006, 11:57pm:
Hi~~~vivkr
Do you know how to simulate the slew rate of opamp by Castello ?
thanks~~~~


Hi,

I have never tried it, but I imagine the simulation should be similar to that of any other opamp. The key is to apply the input, which will cause the largest step at the output of the opamp, and then measure the slewrate at the output. In principle, the Castello amplifier should give a larger slewrate for a larger input in such a way that the amount of time spent slewing is independent of the applied input to a first order. Thus, it is the best approximation to a true first-order system in this regard.

Regards
Vivek

Title: Re: Settling time of fully differential opamp
Post by vivkr on Jul 5th, 2006, 8:20am


vivkr wrote on Jul 5th, 2006, 8:19am:

chungmnig wrote on Jul 4th, 2006, 11:57pm:
Hi~~~vivkr
Do you know how to simulate the slew rate of opamp by Castello ?
thanks~~~~


Hi,

I have never tried it, but I imagine the simulation should be similar to that of any other opamp. The key is to apply the input, which will cause the largest step at the output of the opamp, and then measure the slewrate at the output. In principle, the Castello amplifier should give a larger slewrate for a larger input in such a way that the amount of time spent slewing is independent of the applied input to a first order. Thus, it is the best approximation to a true first-order system in this regard.

Regards
Vivek


I meant true first-order linear system.Note that slewing opamps are not really linear systems...

Vivek

Title: Re: Settling time of fully differential opamp
Post by chungmnig on Jul 5th, 2006, 2:50pm

Hi~~vivkr
This is my problem :
http://www.designers-guide.org/Forum/YaBB.pl?num=1151668781

Could you please help me~~~~~ ::)
thanks~~!!

Title: Re: Settling time of fully differential opamp
Post by vivkr on Jul 10th, 2006, 2:53am


chungmnig wrote on Jul 5th, 2006, 2:50pm:
Hi~~vivkr
This is my problem :
http://www.designers-guide.org/Forum/YaBB.pl?num=1151668781

Could you please help me~~~~~ ::)
thanks~~!!



I see that Sheldon has already solved your problem with a very good explanation. Just make sure
that your circuit is achieving good settling accuracy. I typically look at settling accuracy on the log scale by looking at the difference of the voltages at the 2 opamp inputs, and comparing to the output.

Also, if you are targetting a very high dynamic range
then be careful to note that the current drawn from supply is a function on the inputs. Proper precautions must be taken when feeding in and decoupling the supplies on board level.

Regards
Vivek

Title: Re: Settling time of fully differential opamp
Post by chungmnig on Jul 11th, 2006, 3:58am

Vivek ~~~~  thank you~~~~~~ :)

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