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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> CMOS Voltage reference(Temperature independent) https://designers-guide.org/forum/YaBB.pl?num=1152863914 Message started by dhirajv12 on Jul 14th, 2006, 12:58am |
Title: CMOS Voltage reference(Temperature independent) Post by dhirajv12 on Jul 14th, 2006, 12:58am Hi, I've designed the voltage reference for 1.25V with 20ppm/deg C over -40 to 125deg C.I chose the BG schematic for PTAT current generation to balance for the -ve temp Coifficient of Vbe.The results are satisfactory. But,if I cannot use bipolar transistors and have to generate the same results of 1.2V and 20ppm/deg C for supply variation from 2.25 to 5.5V.(Using only MOS) I need to bias MOS in weak inversion to generate a temperature dependent current to compensate for Vth variation with temperature. Now, can you suggest me a proper topology to implement this.?or some material related. Suggest me how to simulate or verify parameters of MOS in weak inversion? Is it possible to attain a BG voltage of 1.25V with out bipolars. I've come across papers using only MOS for a reference voltage less than 1V. |
Title: Re: CMOS Voltage reference(Temperature independent Post by loose-electron on Aug 1st, 2006, 8:01pm Use a bandgap voltage reference. On all common CMOS processes, there are collector tied PNP transistors inherent to the CMOS foundry process. These are commonly used to build bandgap references. There are heaps of references out there on this one. |
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