The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Mixed-Signal Design >> Latching Comparator Dynamic offset?
https://designers-guide.org/forum/YaBB.pl?num=1154496132

Message started by joey2006 on Aug 1^st, 2006, 10:22pm

Title: Latching Comparator Dynamic offset?
Post by joey2006 on Aug 1^st, 2006, 10:22pm

Dynamic offset is often mentioned for dynamic latch in the comparator, but what exactly is "dynamic offset" (vs. static input offset)? Thanks.

Title: Re: Latching Comparator Dynamic offset?
Post by klash_c on Aug 3^rd, 2006, 10:47am

Static offsets are largely due to mismatches between devices. They are DC offsets that are always present when the comparator is powered on.

Dynamic offsets are caused due to the output swing coupling back to the input through parasitic capacitors like gate-drain and gate-source caps. This causes an offset that is only present when the output of the latch/comparator is switching.

It should be noted that while static offsets mustn't be ignored, dynamic offsets are usually much larger.

Title: Re: Latching Comparator Dynamic offset?
Post by loose-electron on Aug 3^rd, 2006, 3:26pm

Ah the subtle stuff... :D

This is why all analog designers have good job security. ;D

Seriously - Charge injection through non-ideal switches, and Cgs, Cgd type of coupling is a big one.

Then in addition, there is the non-ideal effects of switches where the on-off is not clean (Rds and saturation region effects) and the offset changes with signal size. (Also known as aperture error and sampling window errors) This manifests itself as an offset type of effect.

Then there is the fact that the charge injection changes as a function of the clocking rate.

Those are the ones that come to mind right away.