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https://designers-guide.org/forum/YaBB.pl Modeling >> Behavioral Models >> Behavioral modelling https://designers-guide.org/forum/YaBB.pl?num=1155102826 Message started by chviswanadh on Aug 8th, 2006, 10:53pm |
Title: Behavioral modelling Post by chviswanadh on Aug 8th, 2006, 10:53pm Hello every one, I am new to behavioral modelling. I need some help regaring this. What languages or tools can we use for behavioral modelling? Are there any levels of modelling like the spice modelling? What are the respective advantages and disadvantages of each language or tool? Please help me with these Thanks Kasi |
Title: Re: Behavioral modelling Post by loose-electron on Aug 9th, 2006, 12:44pm The common ones are: Verilog-A Verilog-AMS VHDL-AMS Google it, there is a bunch of stuff out there. Jerry |
Title: Re: Behavioral modelling Post by Ken Kundert on Aug 9th, 2006, 10:04pm Verilog-A is available in SPICE-class simulators; pretty much all of them at this point. Verilog-AMS and VHDL-AMS both require full blown modern mixed-signal simulators like AMS Designer from Cadence or AdvanceMS from Mentor. -Ken |
Title: Re: Behavioral modelling Post by jbdavid on Aug 29th, 2006, 12:25pm Actually the MOST common one is MATLAB.. but this suffers GREATLY from the lack of ability to compare the results easily with the transistor level design.. Verilog-A/Verilog-AMS models can be simulated in the same environment as the transistor level design, but it still takes a knowledgeable person to do all the right simulations.. and compare the right things.. jbd |
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