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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> Bandpass filter specs for a low-IF architecture https://designers-guide.org/forum/YaBB.pl?num=1156225044 Message started by jobless on Aug 21st, 2006, 10:37pm |
Title: Bandpass filter specs for a low-IF architecture Post by jobless on Aug 21st, 2006, 10:37pm I'm trying to design a band pass filter for a low-IF (3 MHz) receiver. The output is fed to a ADC sampling at 200 MHz. The BPF must prevent aliasing of the signal at (fCLK-fIF) i.e at 197 MHz. How much power should I assume at 197 MHz at the IF? The standard gives tolerable power levels only in adjacent and alternate channels.( 197 MHz is more than 10 channels away) |
Title: Re: Bandpass filter specs for a low-IF architectur Post by loose-electron on Aug 22nd, 2006, 7:47am A couple other items needed: - What is the resolution of your ADC? - What is the power of the blocker signal at 197MHz worst case? In an ideal world, you want the blocker reeduced below the detection level of the ADC. However there is one other question that might need to be answered - - What is the tolerable amplitude of aliasing products (nasty because they are in-band) post ADC? A lot of things play off of each other. |
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