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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> How to design a PLL? https://designers-guide.org/forum/YaBB.pl?num=1156934393 Message started by semitao on Aug 30th, 2006, 3:39am |
Title: How to design a PLL? Post by semitao on Aug 30th, 2006, 3:39am Hi,all. I want to design a PLL, but I don't know the PLL design flow. As I know, I should construct the phase-domain model in verilogA first. Then the time-domain model, and the circuit at last. In the phase-domain simulation, I should do the AC simulation for the loop bandwidth and phase margin, then caculate the loop filter parameter. In the time-domain simulation, I should do the tran simulation for the lock time, and I can substitute the circuit block for the verilogA block, then iterate the process for a good result. I don't know in which step I can simulate the noise performance. Which simulation should I do in phase-domain model, time-domain model and circuit? And in the design flow, which parameter in each step I should concern? Best Regards! |
Title: Re: How to design a PLL? Post by loose-electron on Aug 30th, 2006, 8:25am LC-VCO or Ring Oscillator? I would start with the definion of the system requiremens, and start gathering papers and textbooks on the topic. The reason I ask ring osc VCO vs. LC-VCO is they tend to be specified differently. LC tends to be defined in the frequency domain (spectral spreading - phase noise) and ring osc tend to be specified in the time domain (jitter) Is this timing aquisition (ring) or LO for mixer (LC) type of application? Jerry |
Title: Re: How to design a PLL? Post by semitao on Aug 30th, 2006, 6:08pm Ring Oscillator You mean the different type of VCO has different design flow? |
Title: Re: How to design a PLL? Post by loose-electron on Aug 31st, 2006, 12:29pm different ways of specifying their performance, yes. Have you got books on PLL design as of yet? You need to approach this from two different directions - definition of what your system needs (jitter, loop BW, capture time, etc) definion of what you can do with you circuit architecture (charge pump circuits, variable delay cell for VCO ring, etc) Jerry |
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