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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Autozeroed amplifier aliased wideband noise https://designers-guide.org/forum/YaBB.pl?num=1156992886 Message started by ytass on Aug 30th, 2006, 7:54pm |
Title: Autozeroed amplifier aliased wideband noise Post by ytass on Aug 30th, 2006, 7:54pm Hi there, I am trying to design a low noise amplifier for biological evoked potentials. I am tossing up whether or not to use autozeroing technique, correlated double sampling, or chopper stablization. I have been given very tight power consumption requirements (about 30uW max) operating at a 3.3V supply. The amplifier will be 3 stages, with variable gain from 50-80dB in 10dB steps. I would like to use autozeroing because I am of the understanding that chopper stablisation requires more power? Is that correct? Given that I think I should use autozero technique, I am having trouble defining the input transistors noise performance. V_thermal^2 = 4kT * 2/3 * 1/gm for a mos transistor in saturation. I want to bias my input differential pair in moderate inversion, but i think this thermal noise equation is still not a bad approximation for moderate inversion region. Thus the two input tranistors contribute V_in^2 = 16/3 * kT * 1/gm. Now, what I dont understand is, if I use autozero technique, how much will this thermal noise increase by? If my signal bandwidth is about 10 kHz (biological signals are low frequency!) and my autozeroing frequency is 30 kHz, then what will be my actual (i.e. normal + aliased) noise that I would see at the input of my op amp? So if I want my input referred noise to be less than xuV/rms, then I want to know what value of gm i should design for. I hope that an experienced designer can lend a hand to a junior designer. Thank you so much in advance. |
Title: Re: Autozeroed amplifier aliased wideband noise Post by vivkr on Aug 31st, 2006, 4:11am Hi, Just a couple of points: 1. As far as I know, it is CDS that causes a greater increase in noise power and not chopper stabilization. The noise power for conventional CDS goes up by 2x at higher frequencies => Double the thermal noise power. 2. CDS is typically easier to apply in switched-capacitor amplifiers. The big question is whether you are allowed to present a switched-capacitor load at the input of your amplifier or not. If not, then chopper stabilization is probably the only solution. 3. In general, if you use any modified form of CDS, then you can always compute its noise gain by writing out the discrete-time transfer function seen by an input-referred noise source. For example, classic CDS (see Gregorian & Temes) gives an NTF H(z) = (1-1/z), which is equivalent to h[n] = [1 -1]. The power gain of this by Parseval's theorem is simply sum(|h[n]|^2) = 2, which is the noise gain for thermal noise at high-f, and around DC, the gain = 0 which is how it remoes offset and 1/f. You can use this to any DT scheme. 4. If you present a sampling front-end, then you end up with a DT system, and your net noise is proportional to the various capacitances that you use. Typically, it is advisable to use a purely CT solution if power is of concern. I would advise chopping. The power spec is tight, but you have not specified the noise you want. It looks feasible nonetheless. Regards Vivek |
Title: Re: Autozeroed amplifier aliased wideband noise Post by ytass on Aug 31st, 2006, 4:51pm Hi vivkr, I appreciate all of your help so far. The biological signals that I want to amplify have a typical background noise of 5-10uVrms. The time-invariant signals are to be recorded about 50 times, and then averaged to reduce the noise by a factor sqrt(50) = 7 times. Therefore, the complete amplifier system (including averaging) should have an input-referred noise comparable to the cellular noise. I.e. the input-referred noise should be 5uVrms * 7 = 35 uVrms (as averaging will reduce the noise by a factor of 7). I am aiming to have an amplifier measurement system input-referred noise comparable to the noise of the biological signals. 2. Can you please explain further what you mean by "present a switched capacitor load at the input of your amplifier"? Why would this cause problems, (and then make CHS a requirement)? 4. I am a bit confused as to what you mean by "your net noise is proportional to the various capacitances that you use". Can you please explain further? I was also of the understanding that SC/DT circuit has lower power dissipation that CT circuit. Thank you again. If any one else can help out, that would be fantastic. Cheers |
Title: Re: Autozeroed amplifier aliased wideband noise Post by vivkr on Sep 6th, 2006, 2:40am ytass wrote on Aug 31st, 2006, 4:51pm:
Hi, For more details, see pg. 500-513 of the text by Gregorian and Temes (Analog MOS ICs for Signal Processing), and/or Section 2.2 in http://www.designers-guide.org/Analysis/sc-filters.pdf These deal with the issue of noise in sampled systems. More specifically: 2. If you have a switched-capacitor circuit, then the input branch is a capacitor which is connected to the input (vin) each cycle. This charging and discharging is not always tolerable in every system. Firstly, if the biological signal source in your system does not have sufficient drive capability, then you will be loading it severely. A switched-capacitor circuit is essentially a time-varying low-impedance load. Mostly, you would place a high-impedance network at the input, like the gate of a CMOS transistor, so that the signal source sees no load and needs to provide no current. With standard CDS (offset sampling at input), this is not possible. However, with chopper stabilization, you can chop at another point in the system such as the output. You can of course use a modified form of CDS where you sample the offset at the output of your preamp and then cancel it (see the excellent textbook by Razavi where he discusses this in Section 13.2). The requirement is that the gain of the stage be small enough that you do not saturate it while measuring the offset, but this should be possible if you use a multi-stage preamp and perform offset cancellation on each stage. 4. Regarding noise, please read the above references. Essentially, the thermal noise power taken in a sample (sampled system) is constant = kT. When you normalize this to a voltage stored on your cap, the voltage noise level is kT/C, where C is the sampling cap. The noise contributed to an output sample by an amplifier in a sampled system is also proportional to kT/Cc, where Cc is the compensation cap, and the proportionality constant is dependent on the amplifier configuration and design. Thus, in a sampled system, reducing noise => increasing C => increasing power. Thus, wideband noise from all frequencies is aliased down in each sample. If you have a purely continuous-time system on the other hand, only the noise contained within the bandwidth of your system comes into play. However, since you are anyway taking samples of the input and averaging them, you have a sampled-data system at some point. The key is to design the system in such a way that the net noise required is achieved without too much power consumption. I hope this helps. But the topic you are interested in is quite a comprehensive one. Regards Vivek |
Title: Re: Autozeroed amplifier aliased wideband noise Post by vivkr on Sep 7th, 2006, 2:00am vivkr wrote on Sep 6th, 2006, 2:40am:
A small correction, the thermal noise energy (not power) per sample is (1/2)*kT (not kT). The rest remains the same. Regards Vivek |
Title: Re: Autozeroed amplifier aliased wideband noise Post by loose-electron on Sep 7th, 2006, 11:08pm For the low power consumption cited why get so fancy with chopper stabilization and similar? Most offsets are pretty static and can be taken care of with a DAC summation in to compensate for them. That can go thru periodic updates in the background. Also, since this is low frequency I expect that there is an ADC and DSP downstream? If so, the ADC output can be used to tweak the offset thru digital feedback to the offset DAC. Little or no power consumed. (at low frequencies anyhow) Also, within limits of ADC range, offsets can be removed digitally from the quantized signal content as well. Other options include analog feedback with low bandwidth, considering you are going around 50-80dB of gain. THat will cause a high pass effect in the forward signal path, so you need to select your BW (near DC) in order to not encroach on your signal of interest. Investigate some of the offset comepnsation techniques used in the analog baseband gain/filter architectures for GSM receivers. It is a similar problem. Jerry |
Title: Re: Autozeroed amplifier aliased wideband noise Post by rf-design on Sep 8th, 2006, 12:30pm I had understood in the past that biological potential contain DC. So there is no reference for a "digital baseband processing" (everythink :-[ goes digital). The difference between biological and GSM is that your heart does not have a midamble. Best Design Tool = Capable Designers ??? |
Title: Re: Autozeroed amplifier aliased wideband noise Post by vivkr on Sep 10th, 2006, 11:04pm Hi Jerry, I think the main issue here is 1/f noise and not offset, since biological signals are typically if the low-f range where this noise is very high. A simple offset calibration will not really remove it. In any event, it is not stated if there really is an ADC down the chain. Autozeroing through CDS or chopper stabilization is not that hard and is more robust. Some autozeroing schemes do use the auxiliary slow feedback path that you mention. Regards Vivek loose-electron wrote on Sep 7th, 2006, 11:08pm:
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Title: Re: Autozeroed amplifier aliased wideband noise Post by loose-electron on Sep 11th, 2006, 12:21am Quote:
The reason that I suggested going away from chopper methods was due to the power constraint mentioned. The charge injection problems there, plus the running switch system all consume power at a higher, out of band, frequency. It sounds like there are 2 issues here - inherent noise (mostly flicker) of the MOS, and, due to the fact that they have up to 80dB of forward gain, you are going to have to deal with the cascaded offsets of a DC coupled system. If the problem is flicker noise and not static offset, I do agree that chopper may be the way to go. CDS sounds promising, although I have never used it and can't comment on it. Not sure, would need to know more about the application. If you want something that has a quiet front end, you could also consider a BiCMOS process and a bipolar front end. (That opens up other problems due to power issues as well of course.) Also, is it a purely analog system? Or does the architecture have an ADC and DSP downstream? (I have no idea.) Averaging was mentioned, so I presume that an ADC/DSP is present, and that gives a bit more freedom in how you deal with things. You still have to get a suitable SNR, and then get rid of the offsets due to the 80 db of gain. The best design tool is a team of capable designers that are willing to discuss technical matters with an open mind to learning and sharing knowledge. Nobody is god in this business. |
Title: Re: Autozeroed amplifier aliased wideband noise Post by vivkr on Sep 11th, 2006, 3:39am Quote:
Agree, but it is necessary if 1/f noise has to be removed. Quote:
The system can be made with ac coupling, and each stage can sample its offset at its output. This is a common way of doing things. Quote:
Averaging does not require that an ADC be used, analog averaging can be used, and I think that is the case here. Regards Vivek |
Title: Re: Autozeroed amplifier aliased wideband noise Post by rf-design on Sep 11th, 2006, 4:56am Hi ytass, I take a second look on the excellent paper posted on edaboard h**p://www.ewh.ieee.org/tc/sensors/Tutorials/makinwa.pdf by user JT. The argument for voting to a chopping system is right. The sampled data system has anyway a k*T/C sampling noise. This sampling noise is distributed over half the sampling frequency. If you use autozero the sampling noise remain but the DC and 1/f get first order highpass filtering. Important is what happens after the first stage. Because of the power limit (<30uW) the avaible current to charge the SC-integrator is limited. So there is a complex system trade off to do between first stage cap size, amplification, sampling frequency and chooper center frequency and chopper bandwidth. That should highlight that I think the following signal chain is the most effective: 1. Chopper input stage Switches could be integrated with the switches for the SC-amplifier. Charge injection effect should cheked against the human source model. Noise resistance define the noise density limit for the switch noise budget. 2. SC-Amplifier Instead of autozero a switched cap amplifier. Gain could be controlled either by using different cap's or by using subcyles to ontrol gain by phase/charge partioning. The gain should be high enough so that the noise budget is defined by the first stage instead of the following. That is similar to RF receiver architectures. Alternative there could be a continiuous amplifier be used. I did not calculate a comparison to a SC amplifier but I think it will be more power efficient for the same input related voltage density. 3. SC-Bandpass Amplifier The bandpass frequency could be centered at a subfraction (n/m, m=2^k, k=0,1,2,..) of the sampling frequency. I suggest to use also amplification within the bandpass stages to improve power budget. Optimisation: If you stick with this architecture you should calculate the building block main parameters. The result is not a simple number but equations relating the cap value with power and noise contribution. The equations or relation could be put into a spreadsheet. Then you could oberserve and optimize the system analog design on a much efficient level. Further it allows you to quick answer the power versus noise question. Or to insert a now block with a different/possible better relation. |
Title: Re: Autozeroed amplifier aliased wideband noise Post by loose-electron on Sep 11th, 2006, 9:39am Ytass: For clarification - there are a handful of questions I think we could use some answers to: Is the system analog end to end or is it analog followed by an ADC-DSP system? Is the preference sampled in time (clocks, SC, chopper etc being viable) or continuous in time? Is the system cost/size limited? (some of the analog averaging and switched capacitor structures take up space and drive cost up, largely due to the capacitors needed.) What is your foundry process? (I see 3.3V power stated, but is this CMOS, BiCMOS or what? Also, if you are doing switch-cap designs, then some foundry model sets don't have proper capacitiance distribution in the models, and the charge injection simulations are messed up.) Is this a battery powered application under a Li-Ion (Or Li-something) battery? (If so, the nominal power of 3.3 might want to be set to a minimum of 2.8 and a nominal of 3.3V) Those are the questions that come to mind. Am I forgetting anything? |
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