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Design >> Analog Design >> Pipelined ADC (OTA Switching Load)
https://designers-guide.org/forum/YaBB.pl?num=1158897621

Message started by packiaraj on Sep 21^st, 2006, 9:00pm

Title: Pipelined ADC (OTA Switching Load)
Post by packiaraj on Sep 21^st, 2006, 9:00pm

Hi,
The OTA used in Flip around Sample and Hold Swiched Cap ckt would see a capactive load in sampling mode different from that in amplifying mode (In amplifying mode SHA is loaded by the first stage MDAC capacitors).

Naturally, we decide the OTA UGB and Gain based on the tolerable final settling error and finite gain error specifications. So, we take into account only the capacitive load in amplifying mode and NOT the load seen by OTA in sampling mode.

But OTA designed, in place, would see a less load in sampling mode, so UGB changes, but the non-dominant poles does not seem to move atleast for the first degree...hence PM changes... So a potential threat to the stability??? ::)

Any help that makes me understand this will be greatly appreciated!!!

Thanks,
Packiaraj.V.

Title: Re: Pipelined ADC (OTA Switching Load)
Post by Sarig on Sep 29^th, 2006, 2:08pm

Hi,
Check if the Switch + sampling Cap does not create a pole which is close to UGB