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Design >> Mixed-Signal Design >> About decimators of sigma-delta ADC
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Message started by icsoul on Sep 28^th, 2006, 6:04pm

Title: About decimators of sigma-delta ADC
Post by icsoul on Sep 28^th, 2006, 6:04pm

Dear all:

Could you give me some advice for decimators?
What's the detailed structure?
What's the principle that the decimators convert one bit PCM code to multi-bit digital code?
What's the relationship between the one bit PCM code and the bit numbers of the final digital code and how
calculate the relationship?

Thanks any reply ,any advice and any material in advance!

Title: Re: About decimators of sigma-delta ADC
Post by blackbird on Sep 29^th, 2006, 8:19pm

I don't know what you'r talking about...but I know you'r from edacn.net.......me too 8-)

Title: Re: About decimators of sigma-delta ADC
Post by trond on Oct 5^th, 2006, 1:54am

References:
Schreiers Book "Delta Sigma Data Conversers: Theory , Design and Simulation" deals with decimation and is a good starting point.
Also, if you seach the net you will find plenty of info.

One example of a decimator is an up/down counter and an accumulator. The up/down counter acts as a filter. It is triangular in time domain, and thus it is sinc² in freq domain. The accumulator does acc=acc+count if digital output is 1 else acc=acc. At the end of one up/down cycle the n-bit accumulator gives you the adc result!

There are many other ways but I found this one quite simple and easy to realize.

Cheers

Title: Re: About decimators of sigma-delta ADC
Post by SATurn on Oct 10^th, 2006, 1:43pm

You can also find as an excelent reference the thesis of ... (I've forgot the exact name of author) on Berkeley university webpage. You can find all you need in details ....

Title: Re: About decimators of sigma-delta ADC
Post by trond on Oct 10^th, 2006, 11:43pm

SATurn, I think this is what you meant.

http://kabuki.eecs.berkeley.edu/thesis.html

Regards

Title: Re: About decimators of sigma-delta ADC
Post by SATurn on Oct 11^th, 2006, 1:52am

Many thanks trond. The proposed thesis is: "Low-power deciomation filter design for ...", by C. J. Barrett. (MSc thesis, Dec. 1997).

Regards