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Design >> Analog Design >> about programmable gain amplifier design
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Message started by mists on Sep 29^th, 2006, 2:48am

Title: about programmable gain amplifier design
Post by mists on Sep 29^th, 2006, 2:48am

I want to design a circuit that the input signal will minus a offset signal and then amplified, the gain is from 1~8, step is 1. I use the following circuit, as you know
Vout=(Voff-Vin)*R2/R1,
I want to adjust r2's value to get different gain, but I found it is hard to design and optimize the amplifier because when we set different gain, the feedback factor of the amplifier also change, so it is hard to design and optimize the amplifier for high speed. the speed is about 60M.

then how to design this function circuit or how to design the ampliifier, wish your comment and help, thanks!

Title: Re: about programmable gain amplifier design
Post by ywguo on Sep 30^th, 2006, 8:20am

Hi,

How do you define "the speed is 60M"? Is it Ft of the amplifier or the frequency of the input signal?

It is difficult because the amplifier doesn't preserve a constant phase margin when the feedback factor varies. Right? However, if the amplifier is used to track a step input signal, you just make the phase margin greater than 60 degree. It's OK.

Best regards,
Yawei

Title: Re: about programmable gain amplifier design
Post by loose-electron on Oct 6^th, 2006, 3:04pm

60 MHz through an op-amp?

Um... well yes, but you are getting into a region where you may want to stop using feedback amplifiers.

Also, another useful trick - optimize the amplifier for the maximum gain, and always use it at the maximum gain.

Insert swiched attenuators (resistors and switches) pre or post the amplifier (as needed) and you are done.

Jerry

Title: Re: about programmable gain amplifier design
Post by andre75 on Oct 6^th, 2006, 4:41pm

The amplifier needs to be stable for the maximum feedback (minimum gain). It will autmatically be stable at higher gains due to the constant GBW product.
If your min gain is 1, the min Noise Gain for that amplifier will be 2.

You can run an ac simulation with the amplifier in a closed feedback loop (use one of the methods described in the Linear Technologies Switcher Cad Software - you can download it for free and the Examples are really good - Loopgain and Loopgain2).

Then make sure the amplifier shows at least 60dB PM with the min gain setting (this means pushing the second pole to about 2.2GBW).

The math gets pretty complex. Depending how fast your amplifier slews, it will go through 2 regions. Slewing and settling.
For a 60MHz signal you will have about 8.3ns to settle (awfully short).
Depending on the gain, the amplifier will enter the linear settling period at about Vout(final)-0.1V (for CMOS, rough number), which means you need to have maybe 5 times the internal time constant to wait for 0.1% accuracy.
Anyways, 60MHz seems a little bit too much. Consider the sizes of the resistors and the parasitic poles (at the input pins of the amplifier, coming from the resistor parasitic caps and the amplifier input). Those will add some additional phase shift.

Title: Re: about programmable gain amplifier design
Post by RobG on Oct 18^th, 2006, 9:07pm

A few things... use a current feedback amplifier if possible.

If not, try this, but I expect this will kill your noise and offset spec.
1) keep R2 constant.
2) put a resistor across the +/- terminals of the op-amp (call it R3).
3) vary R1 to get your gain.

As you decrease R1, the gain will lincrease. Your bandwidth will remain constant until R1 ≈ R3/2.

What this does is create a gain of R2/(R1||(R3/2)), which is roughly constant until R1 ≈ R3/2.

If your can't do one of the above, you can also change the compensation capacitance for each value of feedback resistor.

rg