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Design >> Mixed-Signal Design >> 3 phase non-overlapping clock phase generation
https://designers-guide.org/forum/YaBB.pl?num=1159782195

Message started by Faisal on Oct 2^nd, 2006, 2:43am

Title: 3 phase non-overlapping clock phase generation
Post by Faisal on Oct 2^nd, 2006, 2:43am

Hi,

I am looking for some references for 3 phase non-overlapping clock phase generation.

Faisal

Title: Re: 3 phase non-overlapping clock phase generation
Post by ywguo on Oct 2^nd, 2006, 8:29am

Hi Faisal,

Are the 3 phases equal? If so, I think a DLL is required.

Yawei

Title: Re: 3 phase non-overlapping clock phase generation
Post by Faisal on Oct 2^nd, 2006, 11:24am

Hi.

The two phases are equal in time. The third phase is much smaller than the two phases.

Faisal

Title: Re: 3 phase non-overlapping clock phase generation
Post by ywguo on Oct 3^rd, 2006, 6:59am

Hi Faisal,

If the third phase is much smaller than the others, it can be achieved by increaseing the delay of both paths. Then get two small phases in the nonoverlapping time of a convetional non-overlapping clock generator. En, it becomes a 4 phase clock. :( However, if the timing budget is not very tight, you just omit one of the small phases.

Best regards,
Yawei

Title: Re: 3 phase non-overlapping clock phase generation
Post by Faisal on Oct 3^rd, 2006, 12:40pm

Hi Yawei,

Thanks for the reply. Any ideas on the delay element/line implementation. I do not like using inverter as a delay element. I am looking for a design, which gives me more control on the delay, could be voltage controlled/ digital controlled.

Papers/Reference ??

Faisal

Title: Re: 3 phase non-overlapping clock phase generation
Post by ywguo on Oct 5^th, 2006, 9:08am

Faisal,

I don't like using inverter as a delay element, too. However, it is easy. :)

Sure you could use something voltage/digital controlled if you need a precise third phase. There are many papers/reference about delay cell design.

Yawei

Title: Re: 3 phase non-overlapping clock phase generation
Post by loose-electron on Oct 6^th, 2006, 3:23pm

take a look in the IEEE JSSC on the subject of VCO's that use Ring Oscillators. The delay element there are applicible here.

Jerry

Title: Re: 3 phase non-overlapping clock phase generation
Post by Andrew Beckett on Oct 28^th, 2006, 7:33am

I've done this kind of thing in the past by using a chain of inverters with the "supply" of the inverters controlled by a regulator. This regulated supply is then controlled to ensure that the chain of inverters represents once cycle of the clock - in other words, a delay locked loop, as has been suggested before.

Not sure why you object to using inverters for this - it's simple, and works...

Regards,

Andrew.

Title: Re: 3 phase non-overlapping clock phase generation
Post by Andrew Beckett on Oct 28^th, 2006, 7:35am

Of course, if you have a higher frequency clock, you can divide it to obtain your different phases... and then use conventional small delays to provide the non-overlap.

Regards,

Andrew.