The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Modeling >> Semiconductor Devices >> latch up failure
https://designers-guide.org/forum/YaBB.pl?num=1160065716

Message started by jason_class on Oct 5^th, 2006, 9:28am

Title: latch up failure
Post by jason_class on Oct 5^th, 2006, 9:28am

Dear All

Anyone can help to give some idea what could have cause latch up failure ? It is often mentioned the resistance of well are higher than normal. Am I right?
Other than well resistance, what is the other possible factor that contribute to latch up on mos devices?

Kindly enlighten

Thank you

best rgds
Jason

Title: Re: latch up failure
Post by loose-electron on Oct 17^th, 2006, 1:58pm

current thru the bulk, leads to an IR drop across the bulk, get that voltage drop above the Vbe voltage and you turn a parasitic transistor on.

Only got 2 variables to work with here I and R...

There's a lot of stuff out there on this. Google it.

Title: Re: latch up failure
Post by jason_class on Oct 20^th, 2006, 11:54pm

Dear Loose e-

Thank you for the comment. I saw the other posting where you introduce a link to fairchild document. It is interesting to read..I have some doubts with the document. I shall write back later.

Jason