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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> help me with simulation of ac https://designers-guide.org/forum/YaBB.pl?num=1162536987 Message started by spectre on Nov 2nd, 2006, 10:56pm |
Title: help me with simulation of ac Post by spectre on Nov 2nd, 2006, 10:56pm hi everyone, i've built a system of pll with verilog-a.Now i want to do small signal simulation of the system. where should i cut the system and add a small signal there? i've tried to cut the system between divider and PFD,but it output zero for amplitute response. thank you !! |
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