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Design >> Analog Design >> stability analysis of cmfb circuit
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Message started by zychang on Nov 15^th, 2006, 11:42am

Title: stability analysis of cmfb circuit
Post by zychang on Nov 15^th, 2006, 11:42am

Hi all,

I need some help on the stability analysis of my cmfb circuit.
I used a simple resistive divider to sense the output common voltage, and compared it with the threshold voltage of a inverter (standard cell). Also, in order to do the 'stb' analysis, I put an 'iprobe' between the output of the cmfb circuit and the gate of tail current sink.
results shows that the gain crossover point is at around 600MHz and phase crossover point at around 200MHz. according to Razavi's analog book, the loop is unstable.

now, question no. 1: Is it necessarily true if the input signal I'm working with is around 100MHz, which means at that frequency the phase shift is less than 180 degrees?

then I did a transient analysis on this circuit. With small signal input (<50mV amplitude), the result shows the output is ok, no oscillation occurs. But with large signal input (>100mV), oscillation occurs.

question no.2: why is this happening? and if this is because the loop is unstable, is there anything I can do to compensate it?

question no.3: what's the feedback factor, β, in this circuit? According to Razavi' s book again, "the β is less than or equal to unity and does NOT depend on the frequency". But it seems to me that, when the sensed output cm voltage is fedback to the main amplifier, it goes through another amplifier, which is dependent on the frequency.

I have gone through several analog books, but none of them seems to talk about the stability analysis of the cmfb circuit. so if anyone has a idea on this topic, please help me out. thanks in advance.

Mike

Title: Re: stability analysis of cmfb circuit
Post by SATurn on Nov 24^th, 2006, 3:00pm

Hi,

Obviously he CMFB is unstable and you MUST solve this problem even if the signal is not close to the edge frequency. Anything appearing as a CM signal (like jump on supply votage in start-up or even noise) can stimulate your circuit and it oscillates.

This circuit has 2 dominant pole in CM path; one due to CM detector amplifier and the next one due to the main amplifier. You can simply solve this problem by resucing the gain of CMFB. For example you can use a NMOS diode connected load for CM detector amp.

SATurn

Title: Re: stability analysis of cmfb circuit
Post by packiaraj on Nov 27^th, 2006, 12:23am

Hi,
To Compensate: If you don't need very large "Gain cross-over" frequency for the CMFB loop, you may reduce the input stage Gm of the CMFB loop [The input stage Gm for CMFB loop is formed by the tail current source of Main-Amplifier]. This can be done by reducing the aspect ratio of the tail transistor which is controlled by the CMFB return voltage. Proportionately increase the W/L of the tail current portion which is controlled by the Bias Voltage.

Hope this would help.
Packiaraj.V.

Title: Re: stability analysis of cmfb circuit
Post by avlsi on Mar 26^th, 2007, 4:04am

I used a capacitor and inductor to test stability.

let us think the input node of the differential amplifier after the resistive divider i.e., CMFB as node A.

Connect the capacitor to node A . Similarly connect the one end of inductor to node A. The other end to the resistive divider mid point.

The other end of the capacitor is connected to a AC signal source. This technique will not disturb the DC biasing point.

Now, we will do AC analysis by giving the input at the capacitor and take the output from the inductor other end(mid point of resistive divider)

Just see the phase margin, and gain margin.

Hope this helps to solve ur problem

Correct me if I am wrong

Title: Re: stability analysis of cmfb circuit
Post by smarty on Apr 24^th, 2007, 10:00am

Hi,
The method proposed by avlsi seems the best method. :)

The method I use is the same. I use inductor and capacitor to test stability.

one end of inductor connected to the CMFB amplifier input and the other end to the forward amplifier resistor divider mid point.

Connect a capacitor to the inductor node connected to the CMFB amplifier input. Connect an AC source to the other end of the capacitor.

Measure for PM and GM at the inductor node connected to the mid point of resistor divider network.

Cheers,
SBR

Title: Re: stability analysis of cmfb circuit
Post by eng on Apr 24^th, 2007, 3:15pm

Hi all,
I do have similar problem. With "stb" analysis the attached CMFB circuit seems unstable. When I do common mode stability analysis with an ideal CMFB circuit by setting gain= -1 (ideal CMFB: 2 vcvs used as buffers not to load OTA output and resisters used to sense CM then another vscs used to amplify [gain] the error between CM [mid point of resistors] and Vref ) it shows that the CMFB loop is stable with 58 degree PM (loop gain >80 dB).
However with the attached circuit it becomes unstable with -12 degree PM.

In the circuits transistors TN3-6 are used in triode region TN7-8 used as current source. TN5 & TN10 is diode connected loads.

1) How can I improve CMFB loop PM with this circuit? (i.e. by playing pole locations but how?)

2) avlsi and smarty proposed a different way to check stability. What is the difference between stb analysis and that method? Is it really needed here or should I trust what stb analysis gives me? Finally how can I apply that method to my circuit?

thanks

Title: Re: stability analysis of cmfb circuit
Post by avlsi on Apr 24^th, 2007, 8:10pm

The above said method is good, when u work with HSPICE. I use HSPICE for my work.

Title: Re: stability analysis of cmfb circuit
Post by SATurn on May 5^th, 2007, 3:10am

Hello eng,

This configuration is not so good and you "should" apply some modifications to that. To have a "stable" and "accurate" CMFB:

1- TP5 should be diode connected,
2- The current flow in TN8 should be forced to be equal to the nominal bias current of your opamp (let's say IB0).

You can use TP10 to force the current in this branch to be equal to IB0 and use a simple amplifier to bias the gate of TN8 and TN7.

SATurn

Title: Re: stability analysis of cmfb circuit
Post by eng on May 15^th, 2007, 9:13pm

Hi SATurn,
Thanks fro the reply. My design should be low power. I'm burning 30 uA as Opamp's nominal current (tail current source of diff pair) however each branch of cmfb in above picture draws only 8 uA. If I force TN8 for 30uA it will be beyond my current budget. So to have robust and stable one what kind of modification can I do on cmfb without increasing current consumption significantly?

thanks

Title: Re: stability analysis of cmfb circuit
Post by SATurn on May 17^th, 2007, 11:58am

Hello,

If you like to keep the power consumption low; then you can simply scale the CMFB circuit respect to the output branch of your amplifier: both current and transistors. As a whole to have a stable and accurate CMFB:
1) CMFB circuit and output branch of amp should be well matched, and
2) the gain of CMFB circuit itself should not be so high (diode connected transistor is the best choice)

SATurn

Title: Re: stability analysis of cmfb circuit
Post by RobertZ on May 25^th, 2007, 2:59pm

using inductor and capacitor method doesn't break the DC operation point, but may ignore the loading (cap) effect. mock cap loading should inserted at least.
I think iprobe is more accurate.

avlsi wrote on Mar 26^th, 2007, 4:04am:

Title: Re: stability analysis of cmfb circuit
Post by Ken Kundert on May 25^th, 2007, 3:09pm

Using a large inductor and capacitor to break the loop so that you can measure loop gain is well known to be a very poor method. The same is true for the technique that employs a resistor that changes value between the DC analysis and the AC analysis. The most accurate and easiest method is to use Spectre's Stb analysis. If you are not using Spectre, you can implement the technique by hand. To do so, take a look at http://www.kenkundert.com/docs/cd2001-01.pdf.

-Ken

Title: Re: stability analysis of cmfb circuit
Post by RobertZ on May 25^th, 2007, 3:42pm

Hi, Ken,

I agree with you, but not 100%.
I wonder how does iprobe work? middle brook? I have used it for a while and pretty handy.

But, in certain cases, i.e, trans-impedance amplifer (opamp with a resistor feedback to inverting input), or standard interverting amplifers, by nature, they are shunt shunt feedback, meaning sense voltage, feedback current. Using iprobe ignores the nature. Its result is close to inserting a test ac voltage source and measuring voltage feedback. Bottem line is iprobe gives different Loop gain than using two port analysis, which is also introdued in your book.

Thanks,
Robert

Ken Kundert wrote on May 25^th, 2007, 3:09pm: