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Modeling >> Behavioral Models >> Behavioral Models: Charge pumps
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Message started by thamiral on Dec 1^st, 2006, 10:18am

Title: Behavioral Models: Charge pumps
Post by thamiral on Dec 1^st, 2006, 10:18am

Dear All,

I recently came across this website (a job well done!) and as I was browsing through it I found Ken Kundert's behavioral model for a PFD with an amalgamated charge pump. (http://www.designers-guide.org/VerilogAMS/functional-blocks/pfd_cp/pfd_cp.va)

A charge pump is, in general, two ideal switches that connect the "output" node to either Vdd or Gnd. Thus, when the switch to Vdd is "on", the switch to Gnd is "off" and the voltage value of the "output" node is correspondingly set to (Vdd - Potential Drop Of The Switch)

Ken Kundert's behavioral model seems to only drive a current into the output node and therefore, the voltage at the output node will now depend on the impedance presented to the charge pump by any blocks that follow (in a classical PLL, this would probably be the loop filter or a lead-lag filter)

Is my analysis of Ken's model correct? :-?

If so, would it be correct to change Ken's model to output a voltage as opposed to a current? :)

Thanks in advance,

Sincerely,

Taha

Title: Re: Behavioral Models: Charge pumps
Post by Geoffrey_Coram on Dec 4^th, 2006, 5:16am

I thought a charge pump worked by sensing the "output" node and determining if the voltage is too low, in which case it will "pump charge" onto the node to bring the voltage up, or if the voltage is too high, it will allow charge to "escape" to ground. I would expect a large capacitor on the output node.

Title: Re: Behavioral Models: Charge pumps
Post by thamiral on Dec 4^th, 2006, 7:16am

The components that follow a charge pump help determine the operating bandwidth of the PLL loop in which the charge pump sits.

The reason why I think there should be a voltage being set at the charge pump's output is that in all the charge pump schematics that I have seen, there has always been a switch to Vdd and a switch to ground. Thus, any loop filter components that follow will have an input voltage which will be applied to the transfer function of the loop filter.

The funny thing is that I've looked up a few behavioral models of charge pumps and they all do exactly what Ken did (i.e. output a current only and leave the voltage of the charge pump at 0) :exclamation I guess I'll have to keep looking for the answer to this ...

Sincerely,

Taha ...

Geoffrey_Coram wrote on Dec 4^th, 2006, 5:16am:

Title: Re: Behavioral Models: Charge pumps
Post by Ken Kundert on Dec 4^th, 2006, 7:34am

I believe Geoffrey is referring to the type of charge pumps used as DC-DC converters, whereas Taha is talking about the ones used in PLLs.

It was my understanding that there are generally two types of charge pumps used in PLLs, those that output a current and those that output a voltage. Those that output a current should have near infinite gain at DC and so should have small DC phase errors. Those that output a voltage convert the output signal to a current by passing it through a large resistor.

I thought the ones that produce a current were more common, but I could be wrong. Or perhaps with the type of PLL you are designing it is more common to use a voltage drive?

In either case, you should definitely modify the model to better model your circuit, either by converting the output to a voltage or simply using a Norton equivalent to include the output resistor in the charge pump model.

-Ken

Title: Re: Behavioral Models: Charge pumps
Post by thamiral on Dec 4^th, 2006, 8:17am

Thanks for the input Ken,

I didn't actually have a particular PLL design in mind :) ... I came across your behavioral model whilst browsing designers-guide.org (When I come across interesting websites, I have this tendency to read up as much as the website offers)

I guess the reason why I asked was purely because the only type of PLL charge pump I have seen is the variety where mosfets are connected to Vdd and ground. I would assume that this arrangement makes it easier to determine what the output of the loop filter is (VCO input), given an input voltage and its transfer function. After all, the output of the loop filter in a PLL has to be a voltage since the VCO samples this voltage and produces an output frequency that corresponds to the voltage level.

Sincerely

Taha

Ken Kundert wrote on Dec 4^th, 2006, 7:34am:

Title: Re: Behavioral Models: Charge pumps
Post by Aigneryu on Dec 5^th, 2006, 9:30am

Hi,

Pleaase check this, "Analysis of a chargepump PLL: A New Model", IEEE Transactioans on Communications, Vol. 42, No. 7, 1994. I believe the current type charge pump PLL is more popular, since it is inherently an error integrator with a simple capacitor. I think it is more intuitive to think like that.

Regards

Title: Re: Behavioral Models: Charge pumps
Post by jbdavid on Dec 8^th, 2006, 10:30pm

I'll chime in here as well - I have never seen a "charge pump" with a voltage output..
while they usually have fets connected to Vdd and Vss, the biasing is designed so that, when "on"
the current matches a reference current.. MAINLY because the supply voltage is usually NOT well known, so
trying to use that directly would be MORE difficult than using a current source, not easier.
Where Precision/linearity is not the main requirement, it may be that the Rds of the transistor while on
gets close enough to a current source that the circuit works acceptably.. In this case, I think L might be > Lmin, and
W would only be wide enough for the Peak expected current.. But this would tend to give you a wide variation in current
out with Vout, and the effect would be that at a high voltage a "down" would give several times the effect of an "UP" of the same duration, requiring more phase mismatch farther from the center voltage..

In addition the traditional circuit is to use a Voltage Controlled Oscillator and a PI filter for that voltage,
as in Proportional and Integrating ) With a Capacitor doing the integration, to get the voltage the natural "steering"
quantity is "Current" - and acutally a quantity of Charge proportional to the mismatch in phase, hence the term, "charge pump"

(I'm sure that the way we've learned to describe the problem affects the way we understand and design it... but if you and NOT controlling the quantity of CHARGE getting onto the cap (Current *Ontime), I would suggest that its not really a "charge pump" )

I'll reiterate, I've never seen a "voltage output" charge pump - at least without the resistor.. its possible I didn't recognize it, or that my experience is lacking.

(Ok - correct me if I'm wrong - its friday night, and I did pop back into the office for a little while after a couple of beers across the street.. )

Also this is turning into a discussion of the circuit design, while this section of the forum is devoted to behavioral modeling.

So the impact on your behavioral model, if you have that switch type output, - there will be an RDSon that will depend primarily on the control voltage and supply voltage.. and if Vds is large enough you many run the device into saturation as well (which is about where most current sources WANT to run.. ) so now your current source, resistance path needs to move smoothly between the two modes.. which means you need to closely model the transistor IV characteristic while its on..
In the analog world, one has to be careful when treating transistors like switches..
have a nice weekend.

Title: Re: Behavioral Models: Charge pumps
Post by thamiral on Dec 9^th, 2006, 7:16am

Thanks for the reply jbdavid,

You analysis on charge pumps is quite correct.

Fets connected to Vdd and Vss generally result in a voltage potential at the output node in addition to the ability to allow current equal to a certain 'reference current' to pass through (example 100uA)

This output voltage that appears on the output node has the potential to affect the output of the Loop filter (which, as you pointed out, is traditionally a passive RC in series filter) which will then be fed into the VCO.

What prompted me to start this thread was that from a behavioral perspective, should this voltage be modelled, or simply ignored? As a matter of fact, I dont think i've seen anyone model a charge pump with this voltage. So far, I have seen pure current outputs and the voltage at the output node tends to usually be influenced by the equiv. Impedance of the Loop filter and the VCO.

So Ken's model is correct... I guess i'm just trying to understand why :)

Thanks,

Sincerely,

Taha

Title: Re: Behavioral Models: Charge pumps
Post by jbdavid on Mar 17^th, 2007, 7:01pm

Generally speaking if you model the branch relationship as Either a voltage or a current..
ie a resistor can be V = I*r or
I = V/r -- but once you pick one form, then you control only the voltage OR the current, not both...
In the case of the charge pump, the Voltage at the output is determined by the charge stored in the loop filter, and thats affected by the current from the pump. You let the FILTER model that voltage, and just feed it the right current.

Its something thats often hard to understand at first..
People want to model the voltage division instead of modeling the I,V relationship of the resistors, and letting the simulator show the division..

keep working at it.
Jonathan

Title: Re: Behavioral Models: Charge pumps
Post by imtired on May 24^th, 2007, 10:31am

Hi,

Thank you Taha for asking the question and generating the discussion, and thanks to all who diligently explained the charge pump operation.

To add on to what Jonathan was saying about RDSon, is when the output voltage of the charge pump (I say voltage because the current is converted to a voltage by an integrating cap) approaches the supplies, you essentially get a voltage limiting effect. This may not be a problem depending on the type of loop filter you are using (e.g. an opamp filter with RC in the feedback path). But if you want to consider this effect, one thing I've done in the past is to simply put a voltage limiter following the I-V conversion, thereby limiting the output voltage of the charge pump to the supply rails.

I hope that makes sense. Forgive me if my understanding is too simple-minded.

Robert