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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> Verilog A https://designers-guide.org/forum/YaBB.pl?num=1166707376 Message started by kkjupally on Dec 21st, 2006, 5:22am |
Title: Verilog A Post by kkjupally on Dec 21st, 2006, 5:22am How easy is Verilog AMS to learn. How much time does it take to atleast undestand the programs |
Title: Re: Verilog A Post by Geoffrey_Coram on Dec 21st, 2006, 1:03pm If you're familiar with C, it's pretty easy. |
Title: Re: Verilog A Post by makelo on Dec 24th, 2006, 3:56pm I felt that after reading Ken's book, The Designer's Guide to Verilog-AMS, it was pretty easy to get rolling. Verilog-A is similar to many other languages. The MS portion has taken me a little more time to get comfortable with, but is improving with practice. |
Title: Re: Verilog A Post by sheldon on Dec 25th, 2006, 1:28am KK, One important distinction to keep in mind is that learning how to write Verilog-A is fairly straightforward. Learning to translate your circuits into good behavioral models can be a painful learning experience. Best Regards, Sheldon |
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