The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> High-Speed I/O Design >> Would you pls. explain this eye diagram?
https://designers-guide.org/forum/YaBB.pl?num=1166853059

Message started by dandelion on Dec 22^nd, 2006, 9:50pm

Title: Would you pls. explain this eye diagram?
Post by dandelion on Dec 22^nd, 2006, 9:50pm

Hi,
We designed a optical receiver IC which outputs the CMOS level. In the eye diagram mesurements, I found the eye diagram is different with the design(simulation).Pls. see the attached eye diagram, I found the rise edge become distorted, it skewed from about the midpoint. In the design, the rise edge is good and almost symetric with the falling edge. Would anyone pls. explain what happened to thsi eye diagram?

Thanks

Title: Re: Would you pls. explain this eye diagram?
Post by ACWWong on Dec 23^rd, 2006, 5:33am

Too much capacitance at your meaurement point, I think this gives you the slow rising edges. If in the design simulation you include loading parasitic capacitances due to bondpads, ESD, package, PCB and scope probe (maybe 10pF) and you'll see the what you see on the bench.
cheers
aw

Title: Re: Would you pls. explain this eye diagram?
Post by dandelion on Jan 4^th, 2007, 1:04am

ACWWong wrote on Dec 23^rd, 2006, 5:33am:

Hi, aw,
Thanks for the reply.Would you pls. confirm the possible additional 10pF cap, is it just the scope probe or you mean all the bondpads, ESD, package, PCB and scope probe combined?

In the test, I added a ~10 Ohm resistor seriesed connected with the output pin, the eye-diagram is OK again.Would you help to explain it?

Thanks a lot!

Title: Re: Would you pls. explain this eye diagram?
Post by ACWWong on Jan 4^th, 2007, 2:13am

Ocsilloscope scope probes x1 are normally 10pF. ESD, pads, PCB are dependant on your design but typically around 1pF.

dandelion wrote on Jan 4^th, 2007, 1:04am:

In the test, I added a ~10 Ohm resistor seriesed connected with the output pin, the eye-diagram is OK again.Would you help to explain it?

I would if i could, but i can't think of why adding a 10 ohms in series with say a 10pF in parallel with 1Mohm (scope load) would improve matters so much... was the 10 ohms a leaded component with LOTS of parasitic inductance ?

Title: Re: Would you pls. explain this eye diagram?
Post by dandelion on Jan 8^th, 2007, 1:19am

ACWWong wrote on Jan 4^th, 2007, 2:13am:

Ocsilloscope scope probes x1 are normally 10pF. ESD, pads, PCB are dependant on your design but typically around 1pF.

dandelion wrote on Jan 4^th, 2007, 1:04am:

In the test, I added a ~10 Ohm resistor seriesed connected with the output pin, the eye-diagram is OK again.Would you help to explain it?

Hi,AW,
Thanks for the reply. It is helpful to me.

The 10 ohm is not a leaded component. But, when we introduce a lead component like(in fact, the measurement condition is changed slightly), the eye-diagram is also OK without the 10 ohm.

As for why this happened, some guies of us think the added 10 ohms resistors improves the parasitic LCR network and hence the transient reponse. The parasitic LCR network will affect the tnasient reponse with two possibilitoies, one is the overshoot and another is over damped, which above will depend on its transfer function. The added 10 ohm res make it part away from the over damp condition.

Sound reasonable.

Title: Re: Would you pls. explain this eye diagram?
Post by ACWWong on Jan 8^th, 2007, 3:00am

yes, you should be able to draw out the RLC circuit including parsitics from inside the chip (bondwire, ESD, pads, metal), and the PCB pad and PCB routing to surface mount components and finally scope probe. From this you should be able to get an idea of the transfer function loading your CMOS driver... perhaps the 10 ohms gives you a zero in the transfer-function ??

Title: Re: Would you pls. explain this eye diagram?
Post by mg777 on Jan 14^th, 2007, 12:19pm

A few observations based on the eye diagram you provided:

1. The 0-1 transition is different from 1-0, so you've got something non-linear here.

2. The timebase isn't clear. Is it really 4 ns/div? Then you have a 300 ps type fall time. How are you picking up the signal - SMA or probe?

4. Your scope is on 50 Ohm termination and the your waveform is rail to rail. Are you sure your CMOS driver is capable of driving 50 Ohm? Looks like you're driving your output stage into serious saturation and cut-off.

For more info about eye diagrams check out www.eecalc.com/faq.html.