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Modeling >> Passive Devices >> typical inductance variation of on-chip inductor
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Message started by aaron_do on Jan 2^nd, 2007, 10:54pm

Title: typical inductance variation of on-chip inductor
Post by aaron_do on Jan 2^nd, 2007, 10:54pm

Hi all,

can anyone tell me the typical inductance and Q variation of an on-chip inductor. For example a 5 turn top metal spiral inductor with a 100um core, 10 um width and 2um thickness...any good references?

thanks,
Aaron

Title: Re: typical inductance variation of on-chip induct
Post by ACWWong on Jan 3^rd, 2007, 3:00am

Generally inductance varies very little as it is lateral geometry (total enclosed area & turns) based. I've used kits were worst case L variation was something like 1~2%.
What does vary is Q and SRF. Q can change by about 20%~30% but depends on your frequency of operation (skin loss versus metal R loss, parasitic C value & quality due to ~20% delta on oxide thicknesses and shield/sub impedance variation). I normally design with worst case Q in mind.
As for references.... your pdk/foundry should be the starting point..
cheers
aw

Title: Re: typical inductance variation of on-chip induct
Post by aaron_do on Jan 3^rd, 2007, 5:05pm

thanks aw

Aaron