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https://designers-guide.org/forum/YaBB.pl Design >> Mixed-Signal Design >> good paper on noise analysis of CDS circuits https://designers-guide.org/forum/YaBB.pl?num=1167907641 Message started by vivkr on Jan 4th, 2007, 2:47am |
Title: good paper on noise analysis of CDS circuits Post by vivkr on Jan 4th, 2007, 2:47am Hi, Does anyone know a good paper covering the use of correlated double sampling in switched-capacitor circuits in detail? I am specifically looking for a paper where the various noise and speed metrics are quantified so that one may design such a circuit optimally. The standard papers on CDS or chopper stabilization mention the concepts but leave it at that, and the important tradeoffs such as impact of various parasitic caps, the error cap etc. are never forthcoming, nor is a good analysis of the noise from the opamp in such cases. If there is a good reference, it would be great. I did some hand analysis of a circuit I have but after a while, the equations get out of hand, and it is quite hard to verify them. Maybe, a good reference can help in choosing important design parameters carefully, even if the equations are not 100 % rigorous. Regards Vivek |
Title: Re: good paper on noise analysis of CDS circuits Post by carlgrace on Jan 4th, 2007, 6:44am Vivek, Do you have the paper on CDS by Enz and Temes in the November 1996 issue of the Proceedings of the IEEE? It's probably the best reference on CDS circuits out there. It may not be the design guide you are looking for, but if you haven't read it, it will surely help you see what components are important and what can be neglected. This can simplify your analysis. Regards, Carl |
Title: Re: good paper on noise analysis of CDS circuits Post by vivkr on Jan 4th, 2007, 7:31am Dear Carl, I have read it and also the description of CDS in the book by Gregorian & Temes. Nonetheless, these do not cover the subject of actually designing a good CDS amplifier, considering the extra noise and reduced speed when using CDS. Regards Vivek |
Title: Re: good paper on noise analysis of CDS circuits Post by ywguo on Jan 10th, 2007, 8:43pm Vivek, Jipeng Li, Un-Ku Moon, A 1.8V 67-mW 10-bit 100-MS/s pipelined ADC using time-shifted CDS technique, Sep., 2004, JSSC. It analyzed the requirements for amplifier in the pipelined ADC using CDS technique. Yawei |
Title: Re: good paper on noise analysis of CDS circuits Post by vivkr on Jan 12th, 2007, 2:39am Ahh! I know that paper. I had forgotten completely, but you are right on. Thanks Yawei !!! Vivek |
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