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Design >> Analog Design >> Problem in open loop simulation for a 2 st opamp
https://designers-guide.org/forum/YaBB.pl?num=1168347270

Message started by hande.vinayak on Jan 9^th, 2007, 4:54am

Title: Problem in open loop simulation for a 2 st opamp
Post by hande.vinayak on Jan 9^th, 2007, 4:54am

Hello to all,
I am a beginner in a analog VLSI,please help me out to solve my one basic problem.
Currentely,I am designing two stg opamp.In this second stage will be CS amp (in attached diagram M2 n M6).
When I was simulating with open loop config,that time one from these transistor will be in a linear region,and in a unity f/b config I found that its very easy to put these trnsistors in sat region.
Plz,can anybody tell me whether my procedure of designing and simulation is right?
If yes,then how can I measure open loop gain and other parameters of opamp in openloop config (as these two tras will not b in sat always)?
Please,help me out.
Thnx.

Title: Re: Problem in open loop simulation for a 2 st opa
Post by carlgrace on Jan 9^th, 2007, 8:50am

Directly simulating an op amp in an open loop configuration is difficult because of the large gain. The smallest offset cause the output to go to one of the rails. The best way to simulate the op amp's open-loop characteristics is to use an ideal dc feedback that is active at dc and not at ac. One this you can do is use huge resistors in the feedback path. See the Baker and Li text for an example of this.

Title: Re: Problem in open loop simulation for a 2 st opa
Post by Ken Kundert on Jan 9^th, 2007, 4:10pm

Actually, you should never simulate an opamp open loop, in any analysis. See http://www.kenkundert.com/docs/cd2001-01.pdf for directions on how to measure the open loop gain of an opamp without opening the loop.

-Ken

Title: Re: Problem in open loop simulation for a 2 st opa
Post by hande.vinayak on Jan 9^th, 2007, 10:36pm

Really thanx to both of you.

Title: Re: Problem in open loop simulation for a 2 st opa
Post by hande.vinayak on Jan 9^th, 2007, 10:38pm

Hello Carl,
I hav posted my query on ur mail ID carl_r_grace@yahoo.com.
Can you plz clarify that one?
Thx.
Regards,
Vinayak.

Title: Re: Problem in open loop simulation for a 2 st opa
Post by Frank Wiedmann on Jan 9^th, 2007, 11:55pm

Ken Kundert wrote on Jan 9^th, 2007, 4:10pm:

In Spectre, the method described in this article has been implemented in the stb analysis. So, if you are using Spectre, I would strongly recommend that you use the stb analysis for loop gain simulation. If you are using a different simulator, you might want to take a look at http://www.designers-guide.org/Forum/YaBB.pl?num=1155668476/12#12.

Title: Re: Problem in open loop simulation for a 2 st opa
Post by hande.vinayak on Jan 10^th, 2007, 3:04am

thanx very much Frank.

Title: Re: Problem in open loop simulation for a 2 st opa
Post by hande.vinayak on Jan 10^th, 2007, 3:36am

But still I am facing same problem,

If you consider CS amp,
load as pmos current mirror circuit (m2 and m3) and nmos (m1),...(m2 diode connected)
Here if you simulate this amp ckt,I am getting below mention result :

After plotting 'gain and frequency plot'

1. m1 in sat and m2 in sat --> 35 db gain.
2. m1 in linear and m2 in sat --> 12 db gain.
3. m1 in sat and m2 in linear --> 12 db gain.

As we have discussed earlier,it is very difficult to get both transistors in sat region without f/b.
But in two stg opamp when you are connecting this CS amp as a second stage,it has a input from
o/p of differetial amp circuit.
As this differential amp having large o/p range variation,it wont able to keep CS amp's both transistors in sat
region (it results in gain reduction).
Above dicussion regarding open loop configuration.
Then how we can get correct open loop gain?

Plz,help me out. :'(
Thanks.

Title: Re: Problem in open loop simulation for a 2 st opa
Post by qiushidaren on Jan 11^th, 2007, 12:17am

But where is the attached diagram, I can't see it now. :'(

Title: Re: Problem in open loop simulation for a 2 st opa
Post by Andrew Beckett on Jan 15^th, 2007, 7:16am

As Ken pointed out, you should not simulate the amplifier open loop - after all, you're not going to use it open loop are you? The stb analysis in spectre allows you to find the loop gain, phase margin and gain margin for a single-ended or differential feedback loop (as Frank pointed out).

Did you try those, or did you persevere with doing something that you were recommended not to?

I guess a picture showing what you're doing would have helped...

Regards,

Andrew.

Title: Re: Problem in open loop simulation for a 2 st opa
Post by Vabzter on Jan 16^th, 2007, 3:22am

Hi,
This is the procedure we used in our school..maybe this manual will help you..
http://www.es.lth.se/ugradcourses/ICkonst/labhandledning.pdf
BR
Vabzter