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Design >> Analog Design >> any ideal opamp block?
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Message started by topquark on Jan 11^th, 2007, 2:40am

Title: any ideal opamp block?
Post by topquark on Jan 11^th, 2007, 2:40am

Hello folks,

I am doing a preliminary switched cap block-level simulation. For this I need to build an ideal integrator.
I thought the "opamp" instance from ahdlLib would do the job with a feedback cap.
But, it isn't working ! :-/
Infact, i tried to do an inverting amp with that block(V+=Vdd, V-=gnd!, Vref=?), the tran simulation goes fine but opamp just doesn't work as it should!

Anything I'm missing?
What should I connect to the Vref pin?
Any pointers please?
Thanks,
Gau

Title: Re: any ideal opamp block?
Post by Ken Kundert on Jan 11^th, 2007, 8:27am

You might consider using the ideal opamp model given on the Verilog-AMS page: http://www.designers-guide.org/VerilogAMS/basic-models/ideal-opamp/ideal-opamp.va.

-Ken

Title: Re: any ideal opamp block?
Post by avlsi on Jan 23^rd, 2007, 2:50am

Hi , you can use VOtlage controlled VOltage source (VCVS). This is a good way to use ideal opamp. I am using this in my design.

Title: Re: any ideal opamp block?
Post by smarty on Apr 24^th, 2007, 9:29am

Hi,
I think, the ref node in ideal op amp is the Analog ground (kindly correct me if I am wrong).
I have used this model from analogLib.

eg. Y1 OPAMP2 INP INN OUT AGND

Cheers,
SBR

Title: Re: any ideal opamp block?
Post by adesign on Apr 25^th, 2007, 9:44pm

You can give a try with mgcLib available in Design Kits.

Title: Re: any ideal opamp block?
Post by Julian18 on Apr 29^th, 2007, 2:08am

HI,if u are using hspice, u may just put

Eopamp 1 2 OPAMP 3 4

where 1 and 2 is the output port (1:+ 2:- ), while 3 4 is the input port(3:+ 4:- ). make sure u do not mistype the order.

Best Regards

Julian