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Message started by Won on Jan 11th, 2007, 9:18am

Title: Question about LDO design
Post by Won on Jan 11th, 2007, 9:18am

Hi, Folks
I have a question about LDO design
Using 0.6um CMOS process, I try to design LDO which is available to drive 100mA.
I designed error amplifier which has 70dB gain and 10MHz bandwidth.
And I calculated the size of pass device.
K’=42.4uA/V^2, Vdropout=Vdsat=Vgs-Vth=0.2V
(W/L)=2*Ids/(K’*Vdsat^2)=118,371
So, (W/L)=(71mm/0.6um)
The size of pass device is too big!!
Am I correct????

Anyway, I keep designing with following spec.
Supply voltage=3.3V, Output voltage=3V, reference voltage = 1.2V
Quiescent current of feedback network resistors is 5uV.
Feedback network resistors are 240K, 360K each.

Another question is DC analysis with load current condition.
When I try to do DC analysis with full load current (100mA), pass device operates in the saturation region.
It looks fine.
However, for no load current (0A), pass device operates in the cutoff region.
Could you please tell me what I did wrong?
Do I need bypass current in order to make pass device operate in saturation region?

Well, this is first time for designing LDO. Could you please give me some tips?

Best regards,

Won





Title: Re: Question about LDO design
Post by transistor on Jan 15th, 2007, 1:05pm

Your calculation seems fine to me if your up.Cox is 42.4uA/V^2 although I have seen higher numbers for upCox for a 0.6um process. (I guess it depends on the process you are using) However, you'll have other types voltage drops such as series resistance (e.g. of metal). So, you should probably overdesign making your W even wider.

On your second question, you should still have a current thru the pass transistors that flows through feedback resistors to ground. If your feedback resistors are large in size (which is a good idea for a low power design), micro amp(s) of current flows through the huge pass transistor which should operate in sub-threshold/weak-inversion.

-transistor

Title: Re: Question about LDO design
Post by Won on Jan 19th, 2007, 1:54pm

thank you for your tips.
I'll try it

Title: Re: Question about LDO design
Post by loose-electron on Jan 30th, 2007, 1:50pm

LDO's are a fussy feedback system, the power pass transisistor needs to operate from triode (low forward gain with small Vds) to saturation (high forward gain with larger Vds) and the gain of the control loop changes on the order of 30db depending on operating point.

Need to take that into account.

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