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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> about gate caps cgs, cgd, cgb https://designers-guide.org/forum/YaBB.pl?num=1169411342 Message started by Alm on Jan 21st, 2007, 12:29pm |
Title: about gate caps cgs, cgd, cgb Post by Alm on Jan 21st, 2007, 12:29pm Hi, My question is about how Hspice calculates the gate capacitances? For a transistor in the saturation region, I have the following equations for gate caps: Cgs = 2/3 Weff * Leff * Cox + CGSO * Weff Cgd = CGDO * Weff When I compare the values obtained by these equations versus those obtained from hspice .op analysis, I find small differences (eg. 5.264 pF v/s 5.089 pF for a circuit of a one stage cascode.) (A) I am wondering what might be the cause of the error. Are the equations I am using incorrect? (B) I also notice that when some other transistor size changes there is a slight change in the Cgd of the first (unchanged) transistor but not Cgs. What might be the reason for that? Thanks, Alm. |
Title: Re: about gate caps cgs, cgd, cgb Post by Geoffrey_Coram on Jan 22nd, 2007, 8:17am Those equations are probably just approximations in saturation, and the goodness of the approximation depends on how strongly saturated you are. Changing the second transistor slightly changes the bias point of the first, thus changing how saturated it is. |
Title: Re: about gate caps cgs, cgd, cgb Post by Alm on Jan 22nd, 2007, 9:35am Thanks a lot. Could you tell me a little about how does Hspice actually calculate the gate capacitances? From Hspice's manual I obtain the following model equations: for saturation: cgs = cap * CF5 cgd = cap * CF5 * DD+ ) where cap = Cox * Weff * Leff, CF5 = 2/3. The above equations are for CAPOP=2. Does Hspice actually use these equations or uses it for approximating? because these (except DD+ term) are same as those that I mentioned before which were from a text book describing level 3 model. Regards, Alm P. |
Title: Re: about gate caps cgs, cgd, cgb Post by Geoffrey_Coram on Jan 22nd, 2007, 11:35am What MOS model are you using? For BSIM3/4, the Cxy are determined by computing the derivative of the channel charge with respect to the applied biases. The expressions are much more complicated than what you found in the HSpice manual. |
Title: Re: about gate caps cgs, cgd, cgb Post by Alm on Jan 22nd, 2007, 1:29pm I am using MOS level 3 right now. I am guessing even for level 3 Cxy will be determined in the same way except the models for charge calculation will be different (less complex?). Is that correct? Regards, Almitra |
Title: Re: about gate caps cgs, cgd, cgb Post by Geoffrey_Coram on Jan 23rd, 2007, 6:13am I think for level=3 and below, the charge model was, indeed, written in terms of capacitance, which caused some charge non-conservation. So, the equations presented may be what was actually used. |
Title: Re: about gate caps cgs, cgd, cgb Post by Alm on Jan 23rd, 2007, 7:05am I came across the following in Daniel Foty's book about MOSFET modeling ..... 'The Meyer gate capacitance model (used in level 1,2,3) is the only capacitance model which offers a direct analytical solution rather than the iterative numerical techniques that more sophisticated models require. In circuits where charge conservation is not important, Meyer model is a good choice' I think this is what you have tried to explain. Thanks for your replies. -Alm |
Title: Re: about gate caps cgs, cgd, cgb Post by Geoffrey_Coram on Jan 24th, 2007, 4:03am Alm wrote on Jan 23rd, 2007, 7:05am:
I don't understand the comment. BSIM3 doesn't have any "iterative numerical techniques"; it has expressions for the channel charge, and it's straightforward to compute partial derivatives. That said, it does suffer from some quirks around Vds=0. Quote:
Are there such circuits?? I suppose this is a logically true statement: the Meyer model is almost never a good choice, but the set of circuits where charge conservation is not important is an empty set. You might not think your circuit cares about charge conservation, but its lack is likely to cause trouble in transient analysis! |
Title: Re: about gate caps cgs, cgd, cgb Post by zhangjerome on Jan 24th, 2007, 5:34pm Hi all, do the parameters such as Cgs and Cgd calculated by Spectre represent the phycial capacitance bettwen G and S/D with BSIM3 model? If not, is there any tool can do this?? Thank you~~ |
Title: Re: about gate caps cgs, cgd, cgb Post by Geoffrey_Coram on Jan 25th, 2007, 4:54am You have to realize that Cgs and Cgd are *not* two-terminal capacitances. That means that Vd has an effect on Cgs, even though the drain is not directly connected to the "capacitor" Cgs. The way BSIM3 is formulated, it computes the total inversion charge Qinv as a function of Vgs, Vds, Vbs. Then, Qinv is partitioned to the various terminals -- depending on the parameter XPART, you could have Qs getting 100% and Qd getting 0%! Obviously, this is not physical, but it is a limitation of BSIM3, not the simulator. Cgs and Cgd are the partial derivatives of the gate charge (which is usually -Qinv, and the partitioning doesn't come into play); note these are different from Cdg and Csg (where partitioning does matter). |
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