The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> how to generate a user-defined AC source?
https://designers-guide.org/forum/YaBB.pl?num=1169552294

Message started by sugar on Jan 23^rd, 2007, 3:38am

Title: how to generate a user-defined AC source?
Post by sugar on Jan 23^rd, 2007, 3:38am

In spectre AC simulation, I want to generate an AC source whose output is defined as follows,

out = (-1) - 10 * sqrt( f / 0.825 ),

how can I do that?

Title: Re: how to generate a user-defined AC source?
Post by topquark on Jan 23^rd, 2007, 6:19am

First off, I'm not sure what you call "AC source" is sinusoidal!
analogLib has pure sine wave sources vsin or vsource or even exponential sources vexp

There's also a vsffm source; don't know if it can be used for your purpose.

For such custom voltage sources, i guess we need to write ahdl/veriloga code to create a block that takes in arbitrary functions for amplitude and frequency

-Gau

Title: Re: how to generate a user-defined AC source?
Post by Frank Wiedmann on Jan 23^rd, 2007, 7:26am

It will probably be much easier to use an AC amplitude of 1 and to multiply the result of the AC simulation by your factor. Because AC simulation is linear, the results will be the same. You can get the frequency with the xval() calculator function, using any voltage or current in your circuit as argument.

Title: Re: how to generate a user-defined AC source?
Post by sugar on Jan 23^rd, 2007, 8:31pm

topquark and Frank Wiedmann,

thank you for your replies.

Using calculator is not a good method for my case, because I need an AC source, not manipulated simulation result.

I have tried to use verilog-A to model it, but the results are strange. Following is a simple verilog-A model, just for test.

module ac_src(freq, out);
input freq;
output out;
electrical freq, out;
real varOut;
analog begin
varOut = V(freq);
V(out) <+ ac_stim("ac", varOut);
end
endmodule

In above model, freq is a input pin whose value is proportional to simulation frequency.

The simulation results alway show

mag(VF("/out")) = 0
phase(VF("/out")) = 0

what's wrong with my model?