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Design >> Mixed-Signal Design >> S/H droop
https://designers-guide.org/forum/YaBB.pl?num=1170683115

Message started by Croaker on Feb 5^th, 2007, 5:45am

Title: S/H droop
Post by Croaker on Feb 5^th, 2007, 5:45am

The capacitor voltage droops due to Ioff of the switch, the reverse-biased drain diode of the switch, and substrate current.

I'm not seeing how substrate current comes into play.

Title: Re: S/H droop
Post by dkace on Feb 13^th, 2007, 1:10am

What if substrate current results on a lower Id and therefore a voltage drop across the switch, which eventually is presented as a voltage drop on the capacitor controled by this switch? What I am saying is that this is not adirect effect of the capacitor charge rather than on the MOST itself.
What do you think?
D.

Title: Re: S/H droop
Post by Croaker on Feb 13^th, 2007, 7:56am

I don't know. Hmm, I'm sure if I scrounge through my library I can find an explanation. Usually you need a few books on each subject to cover all the gaps one author creates.