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Message started by rajdeep on Feb 7th, 2007, 5:09am

Title: AMS simulation error
Post by rajdeep on Feb 7th, 2007, 5:09am

Hi all,

I am getting this error while running AMS simulator.

Failed to read "/home3/rajdeep/simulation/lp3918_top_test/ams/config/netlist/netlistHeader"

I have checked to see that no such file was created in that path!!  But the directory 'netlist' was created. I
Can anybody suggest what can be the possible reasons??
I have moved to ams simulator because I was getting error in spectreVerilog due to the presence of some bidirectional nets.
Now, ans simulator is  giving this error.

PLEASE HELP!!!

Rajdeep

Title: Re: AMS simulation error
Post by rajdeep on Feb 7th, 2007, 10:23am

Hi all,

Can anybody tell me how to set up the ams simulator??
May be I'm doing some mistake in the ams setup.  I was trying to run a simple invverter, having verilog view.


Here is how I set up the config  view:

Hierarchy Editor -> Write Schematic in the field View (name of the window is New Configuration) -> Choose AMS in Use Template

What I see after this is:
Library List: basic analogLib
View List: verilogams veriloga behavioral functional schematic symbol
Stop List: Symbol

Don't know why it does not choose verilog for the inverter!!!
As  expected it gave an error saying..

*Error* <ACE setSimParams>  Failed to read  /home3/rajdeep/simulation/inv_test/ams/config/netlist/netlistHeader"

AM I MISSING SOMETHING IN THE SET UP?

Rajdeep :-/

Title: Re: AMS simulation error
Post by Andrew Beckett on Feb 7th, 2007, 4:02pm

You've not really given much to go on. My guess is that there are other errors being given too?

You say that it does not choose verilog for the inverter - how do you know that? What views are present under the inverter?

Start off by working through the tutorial in the AMS Documentation - that's a good start.

Regards,

Andrew.


Title: Re: AMS simulation error
Post by rajdeep on Feb 7th, 2007, 9:02pm

Hi Andrew!!

" You say that it does not choose verilog for the inverter - how do you know that? What views are present under the inverter? "

3 views are available for the inverter..layout, symbol, verilog.
Well, in the hierarchy editor I have seen it choosing the symbol view for the inverter. That's how I know.

Is ther a great deal of difference between setting up spectreVerilog and AMS?
Where can I get the AMS documentation?

Rajdeep
:-[

Title: Re: AMS simulation error
Post by zhong on Feb 8th, 2007, 12:27am

If you want AMS to  take the inv verilog view.  In HED you need to bind the inv to verilog view instead symbol view .

The AMS setup is different than Spectre-Verilog.  I would suggest you to read the User Guild from cdsdoc. Also the built-in tutorial is helpful . You can use the tutorial under
CIC_hier/tools/dfII/samples/AMS/
as a starting point to learn AMS ...

zhong

Title: Re: AMS simulation error
Post by Andrew Beckett on Feb 8th, 2007, 11:14am


rajdeep wrote on Feb 7th, 2007, 10:23am:
What I see after this is:
Library List: basic analogLib
View List: verilogams veriloga behavioral functional schematic symbol
Stop List: Symbol


You do not have verilog in the view list, so the only view that it will pick automatically will be symbol. So you have two choices - either add verilog into the view list (in front of symbol), or go over the view name for the inverter cell and use right mouse->view to use, and pick verilog.

Using the hierarchy editor for view selection is the same regardless of whether you are using SpectreVerilog or AMS.

Regards,

Andrew.

Title: Re: AMS simulation error
Post by rajdeep on Feb 8th, 2007, 10:32pm

Hi Andrew,

I have done exactly what you told, but the error remained same.
I think there is some settings problem. I'm not sure.
I wonder what is this <ACE_setSimParams> mean?? This can give me a hint to the problem..


Rajdeep

Title: Re: AMS simulation error
Post by Andrew Beckett on Apr 20th, 2007, 2:01am

That ACE error looks to me like something coming from a Nat Semi flow. I've seen this before:

     \o <ACE> Adding Spectre flowchart step "ACE_setSimParams"

and so I believe it is a local customisation to the spectre flow. Please check with the supplier of your design environment.

Regards,

Andrew.

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