The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Measurements >> Phase Noise and Jitter Measurements >> PLL Phase Noise profile problem
https://designers-guide.org/forum/YaBB.pl?num=1171469792

Message started by HFG on Feb 14^th, 2007, 8:16am

Title: PLL Phase Noise profile problem
Post by HFG on Feb 14^th, 2007, 8:16am

Hello All,

Iam simulating schematic level simulations of phaselocked loops. I run PSS and Pnoise to generate the phaseNoise plot. Regardless of what type of PLL i design i get a phase noise slope of -10dBc/hz per decade but its suppose to be -20dBc/Hz per decade. I am pretty sure its not a circuit issume but a simulator problem. Will incorrect settings result in the wrong profile of the phase noise ? anyone run into this issue before ?

Title: Re: PLL Phase Noise profile problem
Post by Ken Kundert on Feb 14^th, 2007, 9:04am

Have you looked at the noise contributors summary? Where is the noise coming from?

-Ken

Title: Re: PLL Phase Noise profile problem
Post by savithru on Jun 27^th, 2007, 12:15am

Hi ken,

can you pls tell me how to look at the noise contributors summary?

I could not find the menu in spectre RF.

Thanks
SavithRu