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Design >> Mixed-Signal Design >> how to measure the INL DNL and SNR of adc
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Message started by manisms on Feb 25th, 2007, 4:36am

Title: how to measure the INL DNL and SNR of adc
Post by manisms on Feb 25th, 2007, 4:36am

i am desining the 12 bit pipelined adc in cadence .
i want to measure the inl, dnl, snr of my whole circuit
which includes the 11 stages ( every stages is 1.5 bit)
so please send me the test bench to measure these parameters on simulation level..
what input i should force to calculate the inl dnl snr enob sfdr etc.
it would be highly appreciable .
regards
manish

Title: Re: how to measure the INL DNL and SNR of adc
Post by sheldon on Feb 25th, 2007, 6:26am

Manish,

  If you have access to Cadence tools, in the ahdlLib are test
blocks for ADC INL and DNL. These blocks generate the test
signals and measure the INL/DNL. The default blocks are
for 8 bit converters, however, there are an internal variables
you can set for the current application.

`define NUM_ADC_BITS 12        was         8
`define NUM_OF_CODES 4096    was      256
`define NUM_OF_CONVS 16384  was     4096  

In addition, you will need to re-generate the symbol for 12-bits.
One additional comment, the simulation time can be long so
you probably want to combine the testbenches. Setup the simulations
for similar test conditions and only use one source to generate the
input signals. That is, you measure the INL and DNL from the same
stair case. One other option to speed-up the simulation it
to trade-off simulation time for resolution. The default number
of conversions is 16x times greater than the number of bits. If
you can live with 8x the number of steps, the simulation time
is twice as fast.

                                                    Best Regards,

                                                      Sheldon

Title: Re: how to measure the INL DNL and SNR of adc
Post by panditabupesh on Feb 25th, 2007, 12:38pm

Hello
You can use the histogram based method ("Full-speed testing of A/D converters" - Doernberg, JSSC - DEC 1984). The input can be a slow rising  ramp (want  each code to occur several times), or a sine (preferred on the tester, but needs some understanding of the code distribution).

Bupesh

Title: Re: how to measure the INL DNL and SNR of adc
Post by navywhj on Jun 3rd, 2008, 2:23am

Hi Sheldon:
   i have used some ahdl module ,but i can not netlist and run the adc_inl_ideal,please give me some advice.thanks!

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