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Simulators >> AMS Simulators >> Singular Matrix Errors in Cadence VHDL AMS-ncsim
https://designers-guide.org/forum/YaBB.pl?num=1173799128

Message started by badams on Mar 13^th, 2007, 8:18am

Title: Singular Matrix Errors in Cadence VHDL AMS-ncsim
Post by badams on Mar 13^th, 2007, 8:18am

Hi

I was trying to model some transistor level circuits in VHDL AMS using Cadence Spectre VHDLAMS.
I have no clue in how to debug the
"Error found by spectre during DC solution estimation, during IC analysis,
during transient analysis `amsAnalysis'.
Matrix is singular (detected at 'uInv.A1.QB' and 'uInv.Output')
ncsim:*E, RNALER: simulation terminated due to analog error"

Thanks in advance. your help is awaited.

Title: Re: Singular Matrix Errors in Cadence VHDL AMS-ncs
Post by Geoffrey_Coram on Mar 14^th, 2007, 4:45am

I don't understand why you are using VHDLAMS if the circuits are transistor level ...

You probably need to investigate the uInv (ulnv?) model. Is it transistor-level or behavioral?

Title: Re: Singular Matrix Errors in Cadence VHDL AMS-ncs
Post by badamsssl on Mar 14^th, 2007, 8:27pm

Geoffrey_Coram wrote on Mar 14^th, 2007, 4:45am:

I don't understand why you are using VHDLAMS if the circuits are transistor level ...

You probably need to investigate the uInv (ulnv?) model. Is it transistor-level or behavioral?

HI
Thanks for your reply
Iam Modeling a charge based transistor Model accounting to deep submicron effects in vhdl ams and validate its functionality by some benchmark circuits
My model is a purely behavioral one with some simultaneous statements., I was trying to build an inverter using the transistor model. and the outputs were fine for an inverter but it gives the said Singular matrix error message.

Your help is awaited and iam desparate to solve that problem

Srinivas

Title: Re: Singular Matrix Errors in Cadence VHDL AMS-ncs
Post by Geoffrey_Coram on Mar 15^th, 2007, 9:07am

It's almost certainly a modeling error with your simultaneous statements, but I don't have any experience with VHDL-AMS to suggest how you go about debugging it (nor what the common mistakes are) in that language.