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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Measuring capacitance at a node https://designers-guide.org/forum/YaBB.pl?num=1173891771 Message started by Croaker on Mar 14th, 2007, 10:02am |
Title: Measuring capacitance at a node Post by Croaker on Mar 14th, 2007, 10:02am This may seem like a stupid question, but humor me. How do you measure the capacitance at a node (with a simulator)? For example, how would you measure the capacitance seen at the input gate of an inverter as Vgs varies; the result is a plot of C vs V. Thanks! :) |
Title: Re: Measuring capacitance at a node Post by ywguo on Mar 20th, 2007, 10:32pm .print M1:CGSBO About the HSPICE syntax, please refer to the related manual. Yawei |
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