The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design Languages >> Verilog-AMS >> How to model frequency domain in Verilog-A
https://designers-guide.org/forum/YaBB.pl?num=1175797056

Message started by Bill Toole on Apr 5^th, 2007, 11:17am

Title: How to model frequency domain in Verilog-A
Post by Bill Toole on Apr 5^th, 2007, 11:17am

Hi

I am wanting to find out if it is possible to develop frequency domain only models in verilog-A for spectreRF harmonic balance simulations. For example, I would like to create a model for an ideal DC block similar to the DC-Block component in ADS. In the frequency domain this should be simple - if the input frequency is DC, the output is zero otherwise the output is the same as the input for all other frequencies or something along that lines. I am not very familiar with verilog-A yet but I get the feeling that this may be more of a problem than I first thought. I am not asking for the code to do this just weather it is even possible before I dive into the water. If it is possible could you point me to a reference or example of some code for the frequency domain. Thanks in advance

Title: Re: How to model frequency domain in Verilog-A
Post by Ken Kundert on Apr 5^th, 2007, 5:51pm

No, it is not possible.

-Ken