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Message started by ywguo on Apr 10th, 2007, 11:56pm

Title: A current cell used in current-steering DAC
Post by ywguo on Apr 10th, 2007, 11:56pm

Hi, Guys,

Jose Bastos adopted a current cell in his paper, "A 12-bit intrinsic accuracy high-speed CMOS DAC," JSSC 1998. The cell is proposed by Hiroshi Takakura, "A 10 bit 80 MHz glitchless CMOS D/A converter," CICC 1991. A schematic is shown in the attached pdf file.

Here MP1 is a current source biased by VB1, operating in saturation region. MP2 and MP3 are switching transistors operating in linear region, controlled by a pair of complemant digital input d and db. MP4 and MP5 are cascaded transistors isolating the output node from switching transistors. MP4 and MP5 operate in linear region, too. MP4/5 has the same dimensions with MP2/3.

Jose Bastos claimed that the series connection of switching transistor and the cascaded transistor is equivalent to a single transistor working in saturation, with a channel length twice as large.

I don't understand it. If Jose Bastos is right, what is the vth and vdsat for the equivalent transistor working in saturation region?


Best regards,
Yawei

Title: Re: A current cell used in current-steering DAC
Post by fehler on Aug 19th, 2007, 7:24am

it is nonsense. if mp4\mp5 in linear region, then when d is low, mp2 will also be in linear region.
then they are just linear resistors in series. i can not find they a sat. mosfet either.


ywguo wrote on Apr 10th, 2007, 11:56pm:
Hi, Guys,

Jose Bastos adopted a current cell in his paper, "A 12-bit intrinsic accuracy high-speed CMOS DAC," JSSC 1998. The cell is proposed by Hiroshi Takakura, "A 10 bit 80 MHz glitchless CMOS D/A converter," CICC 1991. A schematic is shown in the attached pdf file.

Here MP1 is a current source biased by VB1, operating in saturation region. MP2 and MP3 are switching transistors operating in linear region, controlled by a pair of complemant digital input d and db. MP4 and MP5 are cascaded transistors isolating the output node from switching transistors. MP4 and MP5 operate in linear region, too. MP4/5 has the same dimensions with MP2/3.

Jose Bastos claimed that the series connection of switching transistor and the cascaded transistor is equivalent to a single transistor working in saturation, with a channel length twice as large.

I don't understand it. If Jose Bastos is right, what is the vth and vdsat for the equivalent transistor working in saturation region?


Best regards,
Yawei


Title: Re: A current cell used in current-steering DAC
Post by venki_vlsi on Aug 19th, 2007, 5:56pm

hi ywguo..
What Mr.Bostas told might be  true for certain conditions:Suppose if output swing is 1v(differential output) i.e 0.5 v on either side then switches will be in saturation.This is also needs to keep vth little more(i.e keeping vsb difference large).u try to chekc by keeping chnaging output voltagefrom 0.5 to 1v at output then u will be observe the difference.
Waiting for ur reply.

Title: Re: A current cell used in current-steering DAC
Post by imd1 on Aug 20th, 2007, 2:40am

Dr. *BASTOS* might not like to be called Bostas...

As for the technique of using two transistors in series as one single larger one, it works, check these publications,
http://die.ucu.edu.uy/users/aarnaud/aarnaud_archivos/page0001.htm

Title: Re: A current cell used in current-steering DAC
Post by ywguo on Aug 21st, 2007, 12:39am

Hi Venki,


venki_vlsi wrote on Aug 19th, 2007, 5:56pm:
hi ywguo..
What Mr.Bostas told might be  true for certain conditions:Suppose if output swing is 1v(differential output) i.e 0.5 v on either side then switches will be in saturation.This is also needs to keep vth little more(i.e keeping vsb difference large).u try to chekc by keeping chnaging output voltagefrom 0.5 to 1v at output then u will be observe the difference.
Waiting for ur reply.


The author, Bastos, claimed in his JSSC paper that the switching transistors operate in the linear region. :( Sure it is better that those switches are kept in saturation region. That depends on the application and spec.  


Thanks
Yawei

Title: Re: A current cell used in current-steering DAC
Post by ywguo on Aug 21st, 2007, 2:51am

Hi imd1,


imd1 wrote on Aug 20th, 2007, 2:40am:
Dr. *BASTOS* might not like to be called Bostas...

As for the technique of using two transistors in series as one single larger one, it works, check these publications,
http://die.ucu.edu.uy/users/aarnaud/aarnaud_archivos/page0001.htm


I download and read the paper titled Nanowatt, Sub-nS OTAs, With Sub-10-mV Input Offset, Using Series-Parallel Current Mirrors. It looks NOT like the cell in my first post.

I used series-parallel current cell in my DAC, too, without analysis in depth. So it is interesting to find a paper analyzing it.


Thanks
Yawei

Title: Re: A current cell used in current-steering DAC
Post by imd1 on Aug 21st, 2007, 4:05am

It seems to me that Dr. bastos is using the same principle.

The switching transistor is in series w/ another, unswitched transistor of the same size. The unswitched transistor is always ON, while the switched one is turned ON and OFF. When the switching transistor turns ON it behaves as a composite cascoding device for the current cell device (MP1 in your diagram). Since both transistors in series are identical, the switching transistor can only be in linear region, while the unswitched one can be either in linear or saturation, depending on the voltage on the bus.

The papers from that web page talk about series-parallel devices, and it seemed to me that an explanation of how this kind of structure behaves would help understand the statement of  Dr. Bastos. Their study is interesting, in any case.

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