The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> How to do SP simulation with non-resistive termina https://designers-guide.org/forum/YaBB.pl?num=1176773499 Message started by zhangjerome on Apr 16th, 2007, 6:31pm |
Title: How to do SP simulation with non-resistive termina Post by zhangjerome on Apr 16th, 2007, 6:31pm Now my circuit has a capacitive load and I want to do SP simulation. But the port can only have a real impedance. What should I do? |
Title: Re: How to do SP simulation with non-resistive ter Post by Andrew Beckett on Apr 16th, 2007, 10:12pm Use a more recent version of port. This has other parameters: Port parameters: 55 r=50 Ohm Reference resistance. 56 x=0 Ohm Reference reactance, ignored for time domain analyses. 57 lchock=0.1 H Chock inductor for network analyser. 58 cblock=0.0001 F Blocking capacitance for network analyser. Regards, Andrew. |
Title: Re: How to do SP simulation with non-resistive ter Post by Ken Kundert on Apr 16th, 2007, 10:50pm Andrew, What is a chock inductor? And what are lchock and cblock used for? They have non-zero defaults, does that imply that they are always present? -Ken |
Title: Re: How to do SP simulation with non-resistive ter Post by Andrew Beckett on Apr 16th, 2007, 10:53pm Ken, Good question. I'd not noticed them until I just looked at the help just now. I'll see what I can find and report back. Andrew. |
Title: Re: How to do SP simulation with non-resistive ter Post by ACWWong on Apr 17th, 2007, 2:54am cadence must mean choke inductor (perhaps they like chock because it rhymes with block ???) i must admit i have never noticed an impact of a fixed 0.1H or 1mF in sp sweeps i've ever done in the past or recently.... |
Title: Re: How to do SP simulation with non-resistive ter Post by Andrew Beckett on Apr 17th, 2007, 9:31am I looked a bit further up the help for port: Quote:
You're right about the fact that it should be "choke" inductor - there is a PCR (923338) for this typo to be corrected (and for the grammar errors to be corrected too!). They are only included if you use a 3 terminal port. This was added for compatibility with other SPICE simulators (which have a .net or vport component, or something like that...) Regards, Andrew. |
The Designer's Guide Community Forum » Powered by YaBB 2.2.2! YaBB © 2000-2008. All Rights Reserved. |