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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> parameter array declaration error https://designers-guide.org/forum/YaBB.pl?num=1176811457 Message started by Pavel on Apr 17th, 2007, 5:04am |
Title: parameter array declaration error Post by Pavel on Apr 17th, 2007, 5:04am Hello In my code I try to use the similar instruction as in example in chapter 3.2.3 "Parameter arrays" of Verilog-AMS Language Reference Manual: Code:
The parser gives the following error message: In Affirma-AMS, parameter array declaration is not supported. Where am I wrong? Regards Pavel |
Title: Re: parameter array declaration error Post by Geoffrey_Coram on Apr 17th, 2007, 6:52am Parameter arrays are not supported in Verilog 1364-2005 (they are in SystemVerilog 1800-2005), so your AMS simulator may not haveimplemented the feature. |
Title: Re: parameter array declaration error Post by Pavel on Apr 17th, 2007, 6:55am But why this feature figures in Verilog-AMS Language Reference Manual ? |
Title: Re: parameter array declaration error Post by Geoffrey_Coram on Apr 18th, 2007, 8:55am Parameter arrays are an extension supported in Verilog-AMS. I'm just saying, a number of AMS simulators are really Verilog-1364 simulators with some amount of the AMS extensions supported, and it looks like yours doesn't have everything you want. The simulator message does seem to indicate that the vendor knows it's a valid construct, but unsupported. |
Title: Re: parameter array declaration error Post by Pavel on Apr 19th, 2007, 1:58am Ok, thanks Geoffrey, Just for curiosity (if you know) what simulators support all verilog-AMS features/extensions. I use ncsim (Cadence). Regards. Pavel. |
Title: Re: parameter array declaration error Post by Geoffrey_Coram on Apr 19th, 2007, 5:24am To my knowledge, no simulator supports the *full* LRM 2.2 ... |
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