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Other CAD Tools >> Physical Verification, Extraction and Analysis >> LVS problems
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Message started by Kudie on Apr 23^rd, 2007, 12:26pm

Title: LVS problems
Post by Kudie on Apr 23^rd, 2007, 12:26pm

Hi all,

I'm trying to create a mixed signal layout with two different supply lines for the analog and digital part. I have great problems to get the schematic and the layout matching in the LVS. It looks like that Assura (and Calibre) have problems to match the two supplies. I get messages like "standard cells not connected to gnd!", even when they are connected to vss_d and vdd_d. I have tried to map gnd! to vss_d by an inherited connection (in the schematic), but thats not enough for LVS...

Can anyone give me a hint how to solve this problem?

Thank you very much!
Markus

Title: Re: LVS problems
Post by didac on Apr 23^rd, 2007, 11:12pm

Hi,
sometimes I found strange errors like this in Assura. It seems like it depends on the PDK. As far as I know usually is a problem related to the labels names, try to change the names to things like GNDA,GNDD without "_".
Good luck.