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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Hi, all https://designers-guide.org/forum/YaBB.pl?num=1177584554 Message started by Julian18 on Apr 26th, 2007, 3:49am |
Title: Hi, all Post by Julian18 on Apr 26th, 2007, 3:49am Can anyone here tell what is the size consideration in design MOS current mirror? should I must use equal length? why? what 's the principle when i am choosing the width of the transistor? Could anyone shed some light on this ??? TIA. Julian |
Title: Re: Hi, all Post by Julian18 on Apr 26th, 2007, 7:11pm hi, any suggestions here? Thanks |
Title: Re: Hi, all Post by sheldon on Apr 28th, 2007, 6:39am Julian, It is difficult to answer the question without context, that is, what is the intent of your question? Are you looking for guidelines for best matching? Do you need to increase the output compliance? Do you need to minimize the saturation voltage? In general, it seems like the rules would be something like, 1) Match length 2) Match finger width 3) For high impedance, increasing gate length can help 4) However, it is better to use a more complex mirror design to increase impedance, for example, cascode or gain boost Best Regards, Sheldon |
Title: Re: Hi, all Post by zilinhust on May 6th, 2007, 8:16pm you can read Allen's book-analog CMOS design doing hand calculation,fist |
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