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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> How to simulate quantization noise in ADC https://designers-guide.org/forum/YaBB.pl?num=1177802155 Message started by paulcktang on Apr 28th, 2007, 4:15pm |
Title: How to simulate quantization noise in ADC Post by paulcktang on Apr 28th, 2007, 4:15pm I am working on simulating the noise of a quantizer. I want to know how to simulate the quantization noise and circuit noise by Cadence Spectre? thanks at all! |
Title: Re: How to simulate quantization noise in ADC Post by sheldon on Apr 29th, 2007, 3:31am Paul, It would be good to start by reviewing some of the previous threads on the topic, http://www.designers-guide.org/Forum/YaBB.pl?num=1102800907 If you setup the simulation correctly, then the effect of quantitazation noise will be included in the simulation and will limit the noise floor at the output of the ADC. Simulating circuit noise is a more difficult problem, using Spectre you can at least simulate the effect of jitter by using a noisy clock generator, you will need to create it using verilog-A. Best Regards, Sheldon |
Title: Re: How to simulate quantization noise in ADC Post by paulcktang on Apr 29th, 2007, 10:52pm Thanks! I read the previous thread but I still don't know the detial on how to setup the simulation of quantization noise in Spectre? Do you think PNOISE analysis will be useful? Or I have to compute the quantization error in time domain and then use FFT to compute the quantizaton noise spectrum? Thanks, Paul |
Title: Re: How to simulate quantization noise in ADC Post by Ken Kundert on Apr 29th, 2007, 11:32pm Quantization noise is a large signal phenomenon. You will need to use a transient analysis and an FFT. -Ken |
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