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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> PA gain vs. linearity (Input-TOI/Output TOI) https://designers-guide.org/forum/YaBB.pl?num=1177957006 Message started by jxbvt on Apr 30th, 2007, 11:16am |
Title: PA gain vs. linearity (Input-TOI/Output TOI) Post by jxbvt on Apr 30th, 2007, 11:16am hi is it correct to assume that by reducing gain (tranducer gain--Pout-Pin) of a PA, the input referred amplitude linearity (IP1-dB or Third-Order Intercept (TOI)) increases? i'm not worrying about the phase right now. is it also correct to assume that output referred P1-dB/TOI won't increase because i'm still targetting a certain output power? any explanation is appreciated. thanx |
Title: Re: PA gain vs. linearity (Input-TOI/Output TOI) Post by William Ngai on May 8th, 2007, 12:55pm You're correct in terms of input referred P1dB calculation. However, for PA design all we care is how much power you can deliver to the load at a certain linearity level (TOI or ACPR) with given DC input power. Even your input referred TOI may seem better as you decrease the gain but what really matter is what you can deliver to the load. Your output P1dB is determined by your load-line for given supply voltage. Always back to Ohm's Law ;D |
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