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https://designers-guide.org/forum/YaBB.pl Modeling >> Behavioral Models >> Pulse source in Verilog-A(MS) https://designers-guide.org/forum/YaBB.pl?num=1178633356 Message started by nvs117 on May 8th, 2007, 7:09am |
Title: Pulse source in Verilog-A(MS) Post by nvs117 on May 8th, 2007, 7:09am Hi there, What are the possibilities to model a source which gives a rectangular voltage (or position) pulse at a certain time point? I have tried this here, but this is doesn't give the right result - it always produces large outputs (either below or greater zero). BTW: Don't hesitate, this is a signal-flow approach! ;-) // position pulse module pos_pulse (out_pos); parameter real startval = 10.0; parameter real endval = 0.0; parameter real period = 100.0; parameter real starttime = 1.0; parameter real endtime = 15.0; output out_pos; position out_pos; analog begin @(initial_step) begin Pos(out_pos) <+ slew(startval, 1.0e-9, 1.0e-9); // also tried "transition" here end @(timer(endtime)) begin Pos(out_pos) <+ slew(endval, 1.0e-9, 1.0e-9); // also tried "transition" here end end endmodule Any ideas? Chris |
Title: Re: Pulse source in Verilog-A(MS) Post by Geoffrey_Coram on May 8th, 2007, 12:06pm nvs117 wrote on May 8th, 2007, 7:09am:
I don't think this is legal syntax ... you shouldn't have <+ nor slew inside an event. Instead, you should have a real value that gets set in the events, and the contribution should be performed always: real outval; @(initial_step) outval = startval; @(timer(endtime)) outval = endval; Pos(out_pos) <+ transition(outval, 1n, 1n); |
Title: Re: Pulse source in Verilog-A(MS) Post by nvs117 on May 9th, 2007, 3:59am Hi Geoff, This works fine. Thanks from a VAMS newbie. ;-) |
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