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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> track and hold circuit DFT analysis https://designers-guide.org/forum/YaBB.pl?num=1178736051 Message started by vhdl00 on May 9th, 2007, 11:40am |
Title: track and hold circuit DFT analysis Post by vhdl00 on May 9th, 2007, 11:40am Hi, I was trying to do DFT analysis to my track and hold circuit. How to chose the sample points? The sample frequency has to be the same as Clock? I am considering using coherent sampling. Thanks for any inputs. -steve |
Title: Re: trank and hold circuit DFT analysis Post by ywguo on May 10th, 2007, 12:53am Hi, If that is a track-and-hold at the front-end of ADC, I think that the sampling frequency should the same as the clock. I would choose the sampling points where the output has settled. If using HSPICE, the print step of .tran can be set equal to the cycle of clock. Then print the output using .print card. Try to run a DFT using Matlab. Sometimes we also using .FFT card in HSPICE. However, I am not clear how to set the sampling point accurately. :( Yawei |
Title: Re: trank and hold circuit DFT analysis Post by vhdl00 on May 10th, 2007, 6:35am Thanks for your response. Yawei. I was confused after I tried import output data to matlab, we have to choose sampling points to do fft. I was trying to use the sampling frequnecy same as clock, seems OK. Just want to know if there are some other ways? thanks again -Steve |
Title: Re: track and hold circuit DFT analysis Post by ywguo on May 12th, 2007, 1:19am Steve, Yes, you have to choose sampling points to do DFT after importing the data into matlab if the print step of .tran is not equal to the clock cycle. However, I set the print step of .tran equal to the clock cycle. Does sampling frequency in your post mean sampling frequency of FFT? Yawei |
Title: Re: track and hold circuit DFT analysis Post by vhdl00 on May 12th, 2007, 6:02am Yawei, The sampling frequency I was talking is the one in post-simulation processing FFT in matlab. I will just used your suggestion to set the step size in simulation the same as the clock frequency. Thanks again, -Steve |
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