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Design >> Analog Design >> Noise measurement in HSPICE
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Message started by alirezad on May 15^th, 2007, 1:22pm

Title: Noise measurement in HSPICE
Post by alirezad on May 15^th, 2007, 1:22pm

I am using HSPICE 2006 and BSIM3 models to simulate thermal noise in a very simple two-transistor circuit. I do an ac analysis and then take the integral to get the total noise power. Results from a level 1 model are, of course, as expected; but I get way off results using BSIM3.

The different results I see is not due to body effect (I use pmos transistors with gate and body tied together),
nor is it due to output impedance (I put external resistors in parallel with lvl1 models and there isn't much change),
and also not because of parasitic caps (I put external negative caps in parallel with cgd's to cancel them; result is almost the same anyway. I have also looked at the difference between cgd and cdg and it is very small. I do take account of other parasitic caps to ground of course.)

Another problem is as I decrease the start frequency down to 1Hz and below, the total noise power significantly increases. There is no pole at dc and I do not have this problem when working with level 1 models.

What am I missing here?

Title: Re: Noise measurement in HSPICE
Post by jobless on May 17^th, 2007, 10:16pm

Regarding the noise power shooting up near the DC, its due to flicker noise (or 1/f noise) present in MOS transistors.