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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Problems of tieing Body & Gate terminal??? https://designers-guide.org/forum/YaBB.pl?num=1179526757 Message started by eng on May 18th, 2007, 3:19pm |
Title: Problems of tieing Body & Gate terminal??? Post by eng on May 18th, 2007, 3:19pm Hi all, In a classical miller OpAmp circuit; we want to get more gain so we want to use both gm and gmb. To do that both body and gate terminals of each input nmos diff pair is connected together. The benefit might be; - having higher gain - having low Vt Is there any problem of using nmos in such configuration? i.e.; is latch-up an issue here? (input level may vary from 500mV to 900mV ) (Both devices are tripple nwell RF transistor and the design is done under 1 V supply... to be more specific it's a .18 um process) thanks eng |
Title: Re: Problems of tieing Body & Gate terminal??? Post by carlgrace on May 31st, 2007, 12:00pm Tying the source to the body will increase the parasitic capacitance at the source. It also takes more area because the device needs its own well. Often, these aren't serious issues, and the benefit is worth it. Carl |
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