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Design >> Analog Design >> low noise LDO
https://designers-guide.org/forum/YaBB.pl?num=1179868538

Message started by Won on May 22^nd, 2007, 2:15pm

Title: low noise LDO
Post by Won on May 22^nd, 2007, 2:15pm

Hi, folks

I try to design LDO with 35uVrms output noise at 100~100KHz, using 0.6um standard digital CMOS process.
The feedback gain of LDO is 2.5. So in my calculation, input referred noise of LDO should be less than 14uVrms to reach the spec.
Is it possible to design?
if I increase quiescent current, I can reach at the spec easily. But in my spec, my quiescent current is just 50uA.
And also, I try to increase input device size of error amplifier, but this doen not work.
Is it possible to implement LDO with standard CMOS process? or should I change process such as bi-CMOS?
Could you please give me any info to implement low noise LDO?

Best regards,

Won

Title: Re: low noise LDO
Post by Faisal on May 24^th, 2007, 9:26am

What are the biggest noise contribuitors to your LDO noise budget? Once this is determined, then you can improve your noise specification.

One method could be to implement a unity gain feedback LDO and make the scaling/multiplying factor in the bandgap. This will shift the problem to the bandgap end, but if you have filtered out your bandgap noise, then hopefully you can improve.

Title: Re: low noise LDO
Post by Won on May 24^th, 2007, 9:52am

Thanks Faisal.
I assumed that I can filtered out noise from bandgap.
I'd like to use unity gain feedback LDO.
But I can not use unity gain feedback LDO configuration due to spec.
So dominant noise contributor is error amplifier.
Using large input device of error amplifier can help to reduce noise, but I can not meet the spec.
is any method to reduce noise?

Best regards,

Title: Re: low noise LDO
Post by wave3x on Jun 2^nd, 2007, 1:09am

Won wrote on May 24^th, 2007, 9:52am:

Thanks Faisal.
I assumed that I can filtered out noise from bandgap.
I'd like to use unity gain feedback LDO.
But I can not use unity gain feedback LDO configuration due to spec.~~~~~
So dominant noise contributor is error amplifier.
Using large input device of error amplifier can help to reduce noise, but I can not meet the spec.
is any method to reduce noise?

Best regards,

why and what spec reject you from unity gain feedback LDO?
I think it is very hard to design 30uVrms noise from 100 to 100KHz using just 50uA current,
even used unity gain feedback LDO, i think maybe >200uA current is reasonable.

Title: Re: low noise LDO
Post by Faisal on Jun 5^th, 2007, 7:02am

50u is not so low for a LDO design. You might want to decrease the current consumption in other areas of your design to make more current available in the error amplifier. Possible places to reduce power consumption could be to increase the resistors value in the feedback network. If you are using buffer to drive the pass transistor, make sure that you dont spend more than necessary power there.

Title: Re: low noise LDO
Post by Won on Jun 5^th, 2007, 8:49am

Thanks Faisal

Your tip is very helpful.

Best regards,

Won