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Design >> Analog Design >> Number of bandgaps per chip
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Message started by Faisal on Jun 5^th, 2007, 7:33am

Title: Number of bandgaps per chip
Post by Faisal on Jun 5^th, 2007, 7:33am

What are the factors in deciding the number of bandgaps per chip? Does each block really need a seperate bandgap? Can they be shared? What are the trade-offs

Title: Re: Number of bandgaps per chip
Post by loose-electron on Jun 5^th, 2007, 11:10am

Most chips have one bias system -

1. Bandgap, creates one refernce voltage
2. Reference voltage is used in a V to I converter
3. Currents are distributed around the chip, and get locally reconverted back to voltages as needed or used as reference currents.

There are exceptions to the above, but this is the most common methodology. Some devices with RF front ends will use local bias structures for better isolation and noise source control.

Some important items in a mixed signal chip:
Dont distribute ground referenced voltages across a chip. Too much noise.
When creating a current source, put the diode connected transistor that biases it right next to it.
Decouple the bias control with a small capacitiance, enough to suppress the fundamental of the system clock.

There are a million others as well. Here read my white papers on the topic here:

http://www.effectiveelectrons.com/HelpIC.htm

For all mixed signal designers the two part series on noise are a must read.

Title: Re: Number of bandgaps per chip
Post by Faisal on Jun 8^th, 2007, 3:34am

Thank you Jerry for the links. A little bit more information about my design. We have multiple LDO on the same chip so we need to have "voltage references" for each LDO. One possibility could be to use one bandgap per LDO, the advantage being that the voltage references are not distribuited over long distances.

The other option could be to use single bandgap and use V/I and I/V converters but the overall accuracy is then limited by the resistor absolute accuracy.

Title: Re: Number of bandgaps per chip
Post by sheldon on Jun 8^th, 2007, 3:49am

Faisal,

Why do you need to have multiple bandgaps? You could have a single bandgap
drive level shifters to generate any additional reference voltages? You did not
mention it, but triming a voltage reference increases costs since it requires test time
and additional die area. Or you could just include the level shift in the LDO.
A single Band Gap may be more susceptable to cross-talk but they maybe
manageable depending on the system.

My thought would be that there is no absolute answer to this question, the answer
depends on the application: power, cost, performance, off-chip components, package,
and 1000 other factors.

Have you built a system model: board, package, bondwire parasitics, with estimated
interconnect parasitics and tried to analyze the crosstalk, the effect of Band Gap drift
on overall acccuracy, ...? That is, this maybe a good problem to address with behavioral
modeling.

Best Regards,

Sheldon

Title: Re: Number of bandgaps per chip
Post by aaron_do on Jun 12^th, 2007, 12:52am

Hi Jerry,

regarding your papers on noise reduction, are you saying that rather than tapping ground from any point, we should have the ground signal originate from a single point and route it with VDD. e.g. VDD uses M5 and GND uses M4, and the are routed together. through the system from a single origin. Also does this apply to guard rings? My intuition is that the guard rings should be tapped from the lowest potential, and not from the VDD/GND that is routed through the chip.

heres a picture of what i think should be done...

is that right?

not sure if this qualifies as a new topic or not...sorry

thanks in advance,
Aaron