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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> How to realize Buffer with inertial delay in V-AMS https://designers-guide.org/forum/YaBB.pl?num=1181593607 Message started by seefree on Jun 11th, 2007, 1:26pm |
Title: How to realize Buffer with inertial delay in V-AMS Post by seefree on Jun 11th, 2007, 1:26pm I want to write a digital buffer with inertial delay in Verilog-AMS. The digital output is the same as input with delay time "t_delay" except the input pulse time "t_inertial" smaller than half of "t_delay". For example, the buffer has tow parameters, t_delay and t_inertial = [0:t_delay]. If the digital input pulse time (no matter up/down) is bigger than t_inertial, the output is the input with delay t_delay. Otherwise, the output is unchanged. Does Verilog-AMS have the similar system function to realize it? Thanks a lot, |
Title: Re: How to realize Buffer with inertial delay in V Post by Marq Kole on Jul 23rd, 2007, 5:48am The transition function should do well. |
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