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Simulators >> Circuit Simulators >> Signal probing in the extracted view
https://designers-guide.org/forum/YaBB.pl?num=1181747013

Message started by eng on Jun 13^th, 2007, 8:03am

Title: Signal probing in the extracted view
Post by eng on Jun 13^th, 2007, 8:03am

Hi,
Does anybody know how to probe the signals on some nets in the extracted view?

Title: Re: Signal probing in the extracted view
Post by boe on Jun 14^th, 2007, 1:37am

Hi eng,
Which tools do you use?
BOE

Title: Re: Signal probing in the extracted view
Post by eng on Jun 14^th, 2007, 1:24pm

Hi Boe,
I'm using Cadence for both schematic and layout. The process is IBM. For verification I generally use Diva. However I do have access to Assura as well.
thanks

Title: Re: Signal probing in the extracted view
Post by boe on Jun 14^th, 2007, 5:00pm

Hi eng,
If you run an LVS (Diva) first, you can use lvsbx (a Cadence program, it gives a help message when run wo parameters) to annotate the node names etc from the schamtic to the extracted.
I hope this helps.
BOE

Title: Re: Signal probing in the extracted view
Post by sheldon on Jun 14^th, 2007, 8:35pm

Eng,

Have you tried probing from the schematic? This capability was added
a while ago, you need to see the manual for details.

To start the
Select Tools --> Parasitics in Composer to activate the Parasitics menu